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Merge branch 'isa_fix_mac_ver' into 'devel'
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MAC fix bug in monitor and remove old

See merge request ndk/ofm!260
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@jakubcabal
jakubcabal committed Aug 24, 2023
2 parents 4de6741 + 8074c59 commit 8ea6325
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Showing 23 changed files with 112 additions and 109 deletions.
4 changes: 2 additions & 2 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/Modules.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
set COMPONENTS [ list \
[list "COMMON" "$OFM_PATH/comp/uvm/common" "FULL"] \
[list "RESET" "$OFM_PATH/comp/uvm/reset" "FULL"] \
[list "MAC_SEG" "$OFM_PATH/comp/uvm/byte_array_intel_mac_seg" "FULL"] \
[list "MFB" "$OFM_PATH/comp/uvm/byte_array_mfb" "FULL"] \
[list "LVA_MFB" "$OFM_PATH/comp/uvm/logic_vector_array_mfb" "FULL"] \
[list "MAC_SEG" "$OFM_PATH/comp/uvm/logic_vector_array_intel_mac_seg" "FULL"] \
]


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18 changes: 9 additions & 9 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/env/env.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,8 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
sequencer m_sequencer;

uvm_reset::agent m_reset;
uvm_byte_array_intel_mac_seg::env_rx#(SEGMENTS) m_env_rx;
uvm_byte_array_mfb::env_tx #(REGIONS, REGION_SIZE, 8, 1) m_env_tx;
uvm_logic_vector_array_intel_mac_seg::env_rx#(SEGMENTS) m_env_rx;
uvm_logic_vector_array_mfb::env_tx #(REGIONS, REGION_SIZE, 8, 8, 1) m_env_tx;
//scoreboard
scoreboard sc;

Expand All @@ -27,8 +27,8 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
function void build_phase(uvm_phase phase);
//create configuration
uvm_reset::config_item m_reset_cfg;
uvm_byte_array_intel_mac_seg::config_item m_env_rx_cfg;
uvm_byte_array_mfb::config_item m_env_tx_cfg;
uvm_logic_vector_array_intel_mac_seg::config_item m_env_rx_cfg;
uvm_logic_vector_array_mfb::config_item m_env_tx_cfg;

//reset
m_reset_cfg = new();
Expand All @@ -40,15 +40,15 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
m_env_rx_cfg = new();
m_env_rx_cfg.active = UVM_ACTIVE;
m_env_rx_cfg.interface_name = "RX_MAC_SEQ_IF";
uvm_config_db#(uvm_byte_array_intel_mac_seg::config_item)::set(this, "m_env_rx", "m_config", m_env_rx_cfg);
m_env_rx = uvm_byte_array_intel_mac_seg::env_rx#(SEGMENTS)::type_id::create("m_env_rx", this);
uvm_config_db#(uvm_logic_vector_array_intel_mac_seg::config_item)::set(this, "m_env_rx", "m_config", m_env_rx_cfg);
m_env_rx = uvm_logic_vector_array_intel_mac_seg::env_rx#(SEGMENTS)::type_id::create("m_env_rx", this);

m_env_tx_cfg = new();
m_env_tx_cfg.active = UVM_ACTIVE;
m_env_tx_cfg.interface_name = "TX_MAC_SEQ_IF";
m_env_tx_cfg.meta_behav = uvm_byte_array_mfb::config_item::META_EOF;
uvm_config_db#(uvm_byte_array_mfb::config_item)::set(this, "m_env_tx", "m_config", m_env_tx_cfg);
m_env_tx = uvm_byte_array_mfb::env_tx #(REGIONS, REGION_SIZE, 8, 1)::type_id::create("m_env_tx", this);
m_env_tx_cfg.meta_behav = uvm_logic_vector_array_mfb::config_item::META_EOF;
uvm_config_db#(uvm_logic_vector_array_mfb::config_item)::set(this, "m_env_tx", "m_config", m_env_tx_cfg);
m_env_tx = uvm_logic_vector_array_mfb::env_tx #(REGIONS, REGION_SIZE, 8, 8, 1)::type_id::create("m_env_tx", this);

sc = scoreboard::type_id::create("sc", this);

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9 changes: 5 additions & 4 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/env/model.sv
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Expand Up @@ -13,11 +13,12 @@ class model extends uvm_component;
`uvm_component_param_utils(uvm_mac_seg_rx::model)

localparam LOGIC_WIDTH = 6;
localparam ITEM_WIDTH = 8;

uvm_tlm_analysis_fifo #(uvm_byte_array::sequence_item) rx_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) rx_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) rx_error;

uvm_analysis_port#(uvm_byte_array::sequence_item) tx_packet;
uvm_analysis_port#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) tx_packet;
uvm_analysis_port#(uvm_logic_vector::sequence_item#(1)) tx_error;

local uvm_common::stats packet_size_stats;
Expand All @@ -33,10 +34,10 @@ class model extends uvm_component;
endfunction

task run();
uvm_byte_array::sequence_item rx_tr_packet;
uvm_logic_vector_array::sequence_item#(ITEM_WIDTH) rx_tr_packet;
uvm_logic_vector::sequence_item#(LOGIC_WIDTH) rx_tr_error;

uvm_byte_array::sequence_item tx_tr_packet;
uvm_logic_vector_array::sequence_item#(ITEM_WIDTH) tx_tr_packet;
uvm_logic_vector::sequence_item#(1) tx_tr_error;

forever begin
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13 changes: 7 additions & 6 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/env/scoreboard.sv
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Expand Up @@ -12,16 +12,17 @@ class scoreboard extends uvm_scoreboard;
`uvm_component_utils(uvm_mac_seg_rx::scoreboard)

localparam LOGIC_WIDTH = 6;
localparam ITEM_WIDTH = 8;

//CONNECT DUT
uvm_analysis_export #(uvm_byte_array::sequence_item) analysis_export_rx_packet;
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_export_rx_packet;
uvm_analysis_export #(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) analysis_export_rx_error;
uvm_analysis_export #(uvm_byte_array::sequence_item) analysis_export_tx_packet;
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_export_tx_packet;
uvm_analysis_export #(uvm_logic_vector::sequence_item#(1)) analysis_export_tx_error;
//output fifos
uvm_tlm_analysis_fifo #(uvm_byte_array::sequence_item) model_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) model_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(1)) model_fifo_error;
uvm_tlm_analysis_fifo #(uvm_byte_array::sequence_item) dut_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) dut_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(1)) dut_fifo_error;
//models
model m_model;
Expand Down Expand Up @@ -70,9 +71,9 @@ class scoreboard extends uvm_scoreboard;
endfunction

task run_phase(uvm_phase phase);
uvm_byte_array::sequence_item tr_model_packet;
uvm_logic_vector_array::sequence_item#(ITEM_WIDTH) tr_model_packet;
uvm_logic_vector::sequence_item#(1) tr_model_error;
uvm_byte_array::sequence_item tr_dut_packet;
uvm_logic_vector_array::sequence_item#(ITEM_WIDTH) tr_dut_packet;
uvm_logic_vector::sequence_item#(1) tr_dut_error;

forever begin
Expand Down
10 changes: 5 additions & 5 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/env/sequence.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/

class seq_small_pkt extends uvm_byte_array::sequence_simple;
class seq_small_pkt extends uvm_logic_vector_array::sequence_simple#(8);
`uvm_object_utils(uvm_mac_seg_rx::seq_small_pkt)
function new(string name="seq_small_pkt");
super.new(name);
Expand All @@ -17,7 +17,7 @@ class seq_small_pkt extends uvm_byte_array::sequence_simple;
cfg.transaction_count_set(1, 20);
endfunction

function void config_set(uvm_byte_array::config_sequence cfg);
function void config_set(uvm_logic_vector_array::config_sequence cfg);
endfunction
endclass

Expand Down Expand Up @@ -46,7 +46,7 @@ class sequence_simple_1 extends uvm_sequence;

//////////////////////////////////
// variables
uvm_sequence #(uvm_byte_array::sequence_item) rx_packet;
uvm_sequence #(uvm_logic_vector_array::sequence_item#(8)) rx_packet;
uvm_logic_vector::sequence_simple#(LOGIC_WIDTH) rx_error;
uvm_sequence#(uvm_reset::sequence_item) reset_seq;

Expand All @@ -57,9 +57,9 @@ class sequence_simple_1 extends uvm_sequence;
endfunction

virtual function void seq_create();
uvm_byte_array::sequence_lib rx_packet_lib;
uvm_logic_vector_array::sequence_lib#(8) rx_packet_lib;

rx_packet_lib = uvm_byte_array::sequence_lib::type_id::create("seq_data");
rx_packet_lib = uvm_logic_vector_array::sequence_lib#(8)::type_id::create("seq_data");
rx_packet_lib.init_sequence();
rx_packet_lib.add_sequence(seq_small_pkt::get_type());
rx_packet_lib.min_random_count = 100;
Expand Down
2 changes: 1 addition & 1 deletion comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/env/sequencer.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ class sequencer extends uvm_sequencer;

// variables
uvm_reset::sequencer reset;
uvm_byte_array::sequencer rx_packet;
uvm_logic_vector_array::sequencer#(8) rx_packet;
uvm_logic_vector::sequencer#(LOGIC_WIDTH) rx_error;

//functions
Expand Down
21 changes: 6 additions & 15 deletions comp/nic/mac_lite/rx_mac_lite/comp/adapters/mac_seg/uvm/test/base.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@ class base extends uvm_test;
/////////////////////
// variables
uvm_mac_seg_rx::env#(SEGMENTS, REGIONS, REGION_SIZE) m_env;
bit timeout;

/////////////////////
// functions
Expand All @@ -30,15 +29,9 @@ class base extends uvm_test;
#(time_length*1us);
endtask

task test_wait_result();
do begin
#(600ns);
end while (m_env.sc.used() != 0);
timeout = 0;
endtask

//run virtual sequence on virtual sequencer
virtual task run_phase(uvm_phase phase);
time time_start;
uvm_mac_seg_rx::sequence_simple_1 seq;

uvm_component c;
Expand All @@ -53,18 +46,16 @@ class base extends uvm_test;
seq.randomize();
seq.start(m_env.m_sequencer);

timeout = 1;
fork
test_wait_timeout(20);
test_wait_result();
join_any;

time_start = $time();
while ((time_start + 20us) > $time() && m_env.sc.used() != 0) begin
#(600ns);
end
phase.drop_objection(this);
endtask

function void report_phase(uvm_phase phase);
`uvm_info(this.get_full_name(), {"\n\tTEST : ", this.get_type_name(), " END\n"}, UVM_NONE);
if (timeout) begin
if (m_env.sc.used() != 0) begin
`uvm_error(this.get_full_name(), "\n\t===================================================\n\tTIMEOUT SOME PACKET STUCK IN DESIGN\n\t===================================================\n\n");
end
endfunction
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4 changes: 2 additions & 2 deletions comp/nic/mac_lite/tx_mac_lite/comp/adapters/mac_seg/uvm/Modules.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
set COMPONENTS [ list \
[list "COMMON" "$OFM_PATH/comp/uvm/common" "FULL"] \
[list "RESET" "$OFM_PATH/comp/uvm/reset" "FULL"] \
[list "MFB" "$OFM_PATH/comp/uvm/byte_array_mfb" "FULL"] \
[list "MAC_SEG" "$OFM_PATH/comp/uvm/byte_array_intel_mac_seg" "FULL"] \
[list "MFB" "$OFM_PATH/comp/uvm/logic_vector_array_mfb" "FULL"] \
[list "MAC_SEG" "$OFM_PATH/comp/uvm/logic_vector_array_intel_mac_seg" "FULL"] \
]


Expand Down
18 changes: 9 additions & 9 deletions comp/nic/mac_lite/tx_mac_lite/comp/adapters/mac_seg/uvm/env/env.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,8 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
sequencer#(SEGMENTS) m_sequencer;

uvm_reset::agent m_reset;
uvm_byte_array_mfb::env_rx#(REGIONS, REGION_SIZE, 8, 1) m_env_rx;
uvm_byte_array_intel_mac_seg::env_tx#(SEGMENTS) m_env_tx;
uvm_logic_vector_array_mfb::env_rx#(REGIONS, REGION_SIZE, 8, 8, 1) m_env_rx;
uvm_logic_vector_array_intel_mac_seg::env_tx#(SEGMENTS) m_env_tx;

//scoreboard
scoreboard sc;
Expand All @@ -28,8 +28,8 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
function void build_phase(uvm_phase phase);
//create configuration
uvm_reset::config_item m_reset_cfg;
uvm_byte_array_intel_mac_seg::config_item m_env_tx_cfg;
uvm_byte_array_mfb::config_item m_env_rx_cfg;
uvm_logic_vector_array_intel_mac_seg::config_item m_env_tx_cfg;
uvm_logic_vector_array_mfb::config_item m_env_rx_cfg;

//reset
m_reset_cfg = new();
Expand All @@ -41,17 +41,17 @@ class env#(SEGMENTS, REGIONS, REGION_SIZE) extends uvm_env;
m_env_tx_cfg = new();
m_env_tx_cfg.active = UVM_ACTIVE;
m_env_tx_cfg.interface_name = "TX_MAC_SEQ_IF";
uvm_config_db#(uvm_byte_array_intel_mac_seg::config_item)::set(this, "m_env_tx", "m_config", m_env_tx_cfg);
m_env_tx = uvm_byte_array_intel_mac_seg::env_tx#(SEGMENTS)::type_id::create("m_env_tx", this);
uvm_config_db#(uvm_logic_vector_array_intel_mac_seg::config_item)::set(this, "m_env_tx", "m_config", m_env_tx_cfg);
m_env_tx = uvm_logic_vector_array_intel_mac_seg::env_tx#(SEGMENTS)::type_id::create("m_env_tx", this);

m_env_rx_cfg = new();
m_env_rx_cfg.active = UVM_ACTIVE;
m_env_rx_cfg.meta_behav = uvm_byte_array_mfb::config_item::META_EOF;
m_env_rx_cfg.meta_behav = uvm_logic_vector_array_mfb::config_item::META_EOF;
m_env_rx_cfg.interface_name = "RX_MAC_SEQ_IF";
m_env_rx_cfg.seq_cfg = new();
m_env_rx_cfg.seq_cfg.probability_set(100, 100);
uvm_config_db#(uvm_byte_array_mfb::config_item)::set(this, "m_env_rx", "m_config", m_env_rx_cfg);
m_env_rx = uvm_byte_array_mfb::env_rx#(REGIONS, REGION_SIZE, 8, 1)::type_id::create("m_env_rx", this);
uvm_config_db#(uvm_logic_vector_array_mfb::config_item)::set(this, "m_env_rx", "m_config", m_env_rx_cfg);
m_env_rx = uvm_logic_vector_array_mfb::env_rx#(REGIONS, REGION_SIZE, 8, 8, 1)::type_id::create("m_env_rx", this);

sc = scoreboard::type_id::create("sc", this);

Expand Down
13 changes: 7 additions & 6 deletions comp/nic/mac_lite/tx_mac_lite/comp/adapters/mac_seg/uvm/env/model.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,13 @@
class model extends uvm_component;
`uvm_component_param_utils(uvm_mac_seg_tx::model)

localparam LOGIC_WIDTH = 6;
localparam LOGIC_WIDTH = 6;
localparam ITEM_WIDTH = 8;

uvm_tlm_analysis_fifo #(uvm_common::model_item#(uvm_byte_array::sequence_item)) rx_packet;
uvm_tlm_analysis_fifo #(uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))) rx_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(1)) rx_error;

uvm_analysis_port#(uvm_common::model_item#(uvm_byte_array::sequence_item)) tx_packet;
uvm_analysis_port#(uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))) tx_packet;
uvm_analysis_port#(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) tx_error;

function new(string name, uvm_component parent = null);
Expand All @@ -29,17 +30,17 @@ class model extends uvm_component;
endfunction

task run();
uvm_common::model_item#(uvm_byte_array::sequence_item) rx_tr_packet;
uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) rx_tr_packet;
uvm_logic_vector::sequence_item#(1) rx_tr_error;

uvm_common::model_item#(uvm_byte_array::sequence_item) tx_tr_packet;
uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) tx_tr_packet;
uvm_logic_vector::sequence_item#(LOGIC_WIDTH) tx_tr_error;

forever begin
rx_packet.get(rx_tr_packet);
rx_error.get(rx_tr_error);

tx_tr_packet = uvm_common::model_item#(uvm_byte_array::sequence_item)::type_id::create("tx_tr_packet", this);
tx_tr_packet = uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))::type_id::create("tx_tr_packet", this);
tx_tr_packet.start = rx_tr_packet.start;
$cast(tx_tr_packet.item, rx_tr_packet.item.clone());
tx_tr_error = uvm_logic_vector::sequence_item#(LOGIC_WIDTH)::type_id::create("model_tx_meta");
Expand Down
17 changes: 9 additions & 8 deletions comp/nic/mac_lite/tx_mac_lite/comp/adapters/mac_seg/uvm/env/scoreboard.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -12,16 +12,17 @@ class scoreboard extends uvm_scoreboard;
`uvm_component_utils(uvm_mac_seg_tx::scoreboard)
//CONNECT DUT
localparam LOGIC_WIDTH = 6;
localparam ITEM_WIDTH = 8;

//CONNECT DUT
uvm_analysis_export #(uvm_byte_array::sequence_item) analysis_export_rx_packet;
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_export_rx_packet;
uvm_analysis_export #(uvm_logic_vector::sequence_item#(1)) analysis_export_rx_error;
uvm_analysis_export #(uvm_byte_array::sequence_item) analysis_export_tx_packet;
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_export_tx_packet;
uvm_analysis_export #(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) analysis_export_tx_error;
//output fifos
uvm_tlm_analysis_fifo #(uvm_common::model_item#(uvm_byte_array::sequence_item)) model_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))) model_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) model_fifo_error;
uvm_tlm_analysis_fifo #(uvm_byte_array::sequence_item) dut_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) dut_fifo_packet;
uvm_tlm_analysis_fifo #(uvm_logic_vector::sequence_item#(LOGIC_WIDTH)) dut_fifo_error;
//models
model m_model;
Expand All @@ -30,7 +31,7 @@ class scoreboard extends uvm_scoreboard;
int unsigned errors;

//ADD time to sequence
uvm_common::subscriber#(uvm_byte_array::sequence_item) model_input;
uvm_common::subscriber#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) model_input;


function new(string name, uvm_component parent = null);
Expand All @@ -49,7 +50,7 @@ class scoreboard extends uvm_scoreboard;
endfunction

function void build_phase(uvm_phase phase);
model_input = uvm_common::subscriber#(uvm_byte_array::sequence_item)::type_id::create("model_input", this);
model_input = uvm_common::subscriber#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))::type_id::create("model_input", this);
m_model = model::type_id::create("m_model", this);
endfunction

Expand All @@ -67,9 +68,9 @@ class scoreboard extends uvm_scoreboard;
endfunction

task run_phase(uvm_phase phase);
uvm_common::model_item#(uvm_byte_array::sequence_item) tr_model_packet;
uvm_common::model_item#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) tr_model_packet;
uvm_logic_vector::sequence_item#(LOGIC_WIDTH) tr_model_error;
uvm_byte_array::sequence_item tr_dut_packet;
uvm_logic_vector_array::sequence_item#(ITEM_WIDTH) tr_dut_packet;
uvm_logic_vector::sequence_item#(LOGIC_WIDTH) tr_dut_error;

forever begin
Expand Down
10 changes: 6 additions & 4 deletions comp/nic/mac_lite/tx_mac_lite/comp/adapters/mac_seg/uvm/env/sequence.sv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,10 +30,12 @@ class sequence_simple_1#(SEGMENTS) extends uvm_sequence;
`uvm_object_param_utils(uvm_mac_seg_tx::sequence_simple_1#(SEGMENTS))
`uvm_declare_p_sequencer(uvm_mac_seg_tx::sequencer#(SEGMENTS));

localparam ITEM_WIDTH = 8;

//byte_array::sequence_simple rx_seq;
uvm_sequence#(uvm_reset::sequence_item) reset_seq;
uvm_sequence #(uvm_logic_vector::sequence_item #(1)) rx_seq_meta;
uvm_sequence #(uvm_byte_array::sequence_item) rx_seq_data;
uvm_sequence #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) rx_seq_data;
uvm_intel_mac_seg::sequence_simple_tx#(SEGMENTS) tx_seq;

//////////////////////////////////
Expand All @@ -43,10 +45,10 @@ class sequence_simple_1#(SEGMENTS) extends uvm_sequence;
endfunction

virtual function void seq_create();
uvm_byte_array::sequence_lib rx_seq_data_lib;
uvm_logic_vector_array::sequence_lib#(ITEM_WIDTH) rx_seq_data_lib;

rx_seq_meta = sequence_meta::type_id::create("seq_meta");
rx_seq_data_lib = uvm_byte_array::sequence_lib::type_id::create("seq_data");
rx_seq_data_lib = uvm_logic_vector_array::sequence_lib#(ITEM_WIDTH)::type_id::create("seq_data");
rx_seq_data_lib.init_sequence();
rx_seq_data_lib.min_random_count = 50;
rx_seq_data_lib.max_random_count = 100;
Expand All @@ -56,7 +58,7 @@ class sequence_simple_1#(SEGMENTS) extends uvm_sequence;
tx_seq = uvm_intel_mac_seg::sequence_simple_tx#(SEGMENTS)::type_id::create("intel_mac_tx_seq");

rx_seq_data = rx_seq_data_lib;
//rx_seq_data = uvm_byte_array::sequence_simple::type_id::create("seq_data");
//rx_seq_data = uvm_logic_vector_array::sequence_simple#(ITEM_WIDTH)::type_id::create("seq_data");
endfunction

task intel_mac_seg_tx();
Expand Down
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