Merge pull request #1763 from NXP/add-missing-extensions

Add implemented extensions to readme
riscv-software-src · Aug 7, 2024 · f70b035 · f70b035
2 parents 11fbcb5 + 92833d1
commit f70b035
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/README.md b/README.md
@@ -13,6 +13,7 @@ Spike supports the following RISC-V ISA features:
   - RV32E and RV64E base ISAs, v1.9
   - Zifencei extension, v2.0
   - Zicsr extension, v2.0
+  - Zicntr extension, v2.0
   - M extension, v2.0
   - A extension, v2.1
   - F extension, v2.2
@@ -61,6 +62,7 @@ Spike supports the following RISC-V ISA features:
   - Zvkt  extension, v1.0
   - Zvkn, Zvknc, Zvkng extension, v1.0
   - Zvks, Zvksc, Zvksg extension, v1.0 
+  - Zicond extension, v1.0
   - Zilsd extension, v0.9.0
   - Zcmlsd extension, v0.9.0