Lift restriction on physical-address size

It remains true that PTEs can only represent addresses >= 2^56, but there's
no need to impose that constraint on untranslated accesses.

riscv/mmu.h

@@ -19,7 +19,7 @@
 #define PGSHIFT 12
 const reg_t PGSIZE = 1 << PGSHIFT;
 const reg_t PGMASK = ~(PGSIZE-1);
-#define MAX_PADDR_BITS 56 // imposed by Sv39 / Sv48
+#define MAX_PADDR_BITS 64
 
 struct insn_fetch_t
 {

riscv/sim.cc

@@ -322,7 +322,8 @@ void sim_t::set_procs_debug(bool value)
 
 static bool paddr_ok(reg_t addr)
 {
-  return (addr >> MAX_PADDR_BITS) == 0;
+  _Static_assert(MAX_PADDR_BITS == 8 * sizeof(addr));
+  return true;
 }
 
 bool sim_t::mmio_load(reg_t paddr, size_t len, uint8_t* bytes)

spike_main/spike.cc

@@ -213,22 +213,7 @@ static mem_cfg_t create_mem_region(unsigned long long base, unsigned long long s
     exit(EXIT_FAILURE);
   }
 
-  const unsigned long long max_allowed_pa = (1ull << MAX_PADDR_BITS) - 1ull;
-  assert(max_allowed_pa <= std::numeric_limits<reg_t>::max());
-  mem_cfg_t mem_region(base, size);
-  if (mem_region.get_inclusive_end() > max_allowed_pa) {
-    int bits_required = 64 - clz(mem_region.get_inclusive_end());
-    fprintf(stderr, "Unsupported memory region "
-                    "{base = 0x%" PRIX64 ", size = 0x%" PRIX64 "} specified,"
-                    " which requires %d bits of physical address\n"
-                    "    The largest accessible physical address "
-                    "is 0x%llX (defined by MAX_PADDR_BITS constant, which is %d)\n",
-            mem_region.get_base(), mem_region.get_size(), bits_required,
-            max_allowed_pa, MAX_PADDR_BITS);
-    exit(EXIT_FAILURE);
-  }
-
-  return mem_region;
+  return mem_cfg_t(base, size);
 }
 
 static std::vector<mem_cfg_t> parse_mem_layout(const char* arg)