triggers: performance improvement on execute mcontrol/mcontrol6

riscv-software-src · Sep 13, 2023 · 1779c35 · 1779c35
1 parent 807baa7
commit 1779c35
Showing 1 changed file with 5 additions and 2 deletions.
diff --git a/riscv/mmu.h b/riscv/mmu.h
@@ -290,8 +290,10 @@ class mmu_t
     if (matched_trigger)
       throw *matched_trigger;
 
+    reg_t vpn = addr >> PGSHIFT;
     auto access_info = generate_access_info(addr, FETCH, {false, false, false});
-    check_triggers(triggers::OPERATION_EXECUTE, addr, access_info.effective_virt);
+    if (unlikely(tlb_insn_tag[vpn % TLB_ENTRIES] & TLB_CHECK_TRIGGERS))
+      check_triggers(triggers::OPERATION_EXECUTE, addr, access_info.effective_virt);
     auto tlb_entry = translate_insn_addr(addr);
     insn_bits_t insn = from_le(*(uint16_t*)(tlb_entry.host_offset + addr));
     int length = insn_length(insn);
@@ -309,7 +311,8 @@ class mmu_t
       insn |= (insn_bits_t)from_le(*(const uint16_t*)translate_insn_addr_to_host(addr + 4)) << 32;
       insn |= (insn_bits_t)from_le(*(const uint16_t*)translate_insn_addr_to_host(addr + 6)) << 48;
     }
-    check_triggers(triggers::OPERATION_EXECUTE, addr, access_info.effective_virt, insn);
+    if (unlikely(tlb_insn_tag[vpn % TLB_ENTRIES] & TLB_CHECK_TRIGGERS))
+      check_triggers(triggers::OPERATION_EXECUTE, addr, access_info.effective_virt, insn);
 
     insn_fetch_t fetch = {proc->decode_insn(insn), insn};
     entry->tag = addr;