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Support S32/U32 indices for BWD embedding and index ops & Neuron implicit downcast #8450
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is this PR ready for review @rpsilva-aws? |
@miladm Yes, but there seem to be some issues with the test infra - I need to validate with the TPU docker. I can ping once done/fixed. |
Can just ping me again when the "Build and test" has passed |
Signed-off-by: Emmanuel Ferdman <[email protected]>
…ter/tpu-recipies repo for reference model implementations. (pytorch#8412)
Unfortunately, part of this PR has a dependency on pytorch/pytorch#142160. Instead, creating 2 PRs:
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In this PR, we extend tensor operations to allow S32 indices. This follows suits with other operations, in order to add flexibility and potentially performance benefits for accelerator backends. Reference for embedding dense bwd: https://github.com/pytorch/pytorch/blob/main/aten/src/ATen/native/Embedding.cpp#L117
I re-structure a good portion of the tests to validate both types.
In addition, we also re-introduce the implicit downcasting for Neuron S64/U64 types, since the Neuron compiler does not support 64 bits.