FPGA: Update README to include note about emulator environment variables

[justin-rosner]

Description

The FPGA Emulator has modified how pipe depth is emulated. If a design wishes to increase the host buffer capacity (in emulation) of a host pipe to larger than the buffer on the device, CL_CONFIG_CHANNEL_DEPTH_EMULATION_MODE will have to be set to ignore-depth.

This change updates the README's of designs that do exactly that, and were previously relying on the emulator defaulting to this behaviour.

External Dependencies

• N/A

Type of change

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• Bug fix (non-breaking change which fixes an issue)

How Has This Been Tested?

Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce. Please also list any relevant details for your test configuration

• These are just changes to the README. No code was touched.

[whitepau]

@justin-rosner I thought we were setting the 'infinite host pipe host buffer depth' behaviour to be default:

https://hsdes.intel.com/appstore/article/#/14019216094

why do we need to set an environment variable?

[justin-rosner]

@justin-rosner I thought we were setting the 'infinite host pipe host buffer depth' behaviour to be default:

https://hsdes.intel.com/appstore/article/#/14019216094

why do we need to set an environment variable?

We made that change for the simulator, but when testing the latest sycl/rel resource it appears that the emulator team made the opposite decision. We will have to file a case to the emulator team for the 2025.1 release to have the default once again be infinite pipe depth .