XC2064 was the first FPGA introduced by Xilinx in 1985. Aim of this project is to make SystemC model of this FPGA and provide simulation environment for experimenting with different configurations.
It was inspired by Ken Shirriff's blog post where he explained process of reverse engineering XC2064 and provided all needed information needed for building one by yourself. Besides great work he did on analyzing XC2064 He also built a web application which shows internal configuration of every FPGA internal element. It can be found here. Also datasheet needed to be consuted for small amount of details He left out.
This CLB makes core functional block of XC2064. Grid of CLBs is then connected via routing logic. Internal structure is shown on following image.
Green box represent switching matrix which is implemented in /src/switching_matrix.hpp. Empty square is non directional PIP ( Programmable Interconnect Point), and full squares are normal pips used to route inputs and outputs of CLBs.
- /bitstream - python script that parses bitstream config file and puts it in neat format for loading into simulation
- /src - all C++ source files used in project. Every module is in it's own .hpp file
- /src/OpenQM - Implementation of Quine–McCluskey algorithm written by Andrea Bontempi under GNU GPLv3. Used for verifying functions written to CLBs from bitstream by comparing them to configuration found here.
- Makefile - build script
Build program by running make and run it with ./main
To get waveform output run make wave (in progress)