Fix bug where unconnected array drivers may be omitted incorrectly #496
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Description & Motivation
Similar to the changes in #494, this is an expansion to search properly for potentially undriven or unconventionally connected elements of
LogicArrays andLogicStructures which could sometimes be missed from being added tointernalSignals. This doesn't affect functionality during simulation, and wouldn't really affect generated SystemVerilog either, but the SystemVerilog generation may hit assertions and break assumptions with the missing signals. It can also make results confusing for anything depending oninternalSignalsAPIs.This PR fixes the issues.
Related Issue(s)
N/A
Testing
Add new test + existing tests
Backwards-compatibility
No
Documentation
No