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Avoid Module creation for Constant Gate scenarios #481

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Avoid Module creation for Constant Gate scenarios #481

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292bf2d
Avoid Module creation for Constant Gate scenarios
mjayasim9 Apr 5, 2024
81734f2
Removed extra import
mjayasim9 Apr 5, 2024
efa4b95
Added changes based on comments
mjayasim9 Apr 8, 2024
7a3974a
Merge branch 'main' of https://github.com/mjayasim9/rohd into ConstGates
mjayasim9 Jun 18, 2024
cbf0c26
Merge branch 'intel:main' into ConstGates
mjayasim9 Jul 9, 2024
8e7789b
Added fixes based on feedback
mjayasim9 Jul 9, 2024
abb0d87
Merge branch 'main' of https://github.com/mjayasim9/rohd into ConstGates
mjayasim9 Jul 9, 2024
4393d10
Merge branch 'ConstGates' of https://github.com/mjayasim9/rohd into C…
mjayasim9 Jul 9, 2024
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36 changes: 33 additions & 3 deletions lib/src/signals/logic.dart
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Original file line number Diff line number Diff line change
Expand Up @@ -319,13 +319,43 @@ class Logic {
void operator <=(Logic other) => gets(other);

/// Logical bitwise NOT.
Logic operator ~() => NotGate(this).out;
Logic operator ~() => this is Const ? Const(~value) : NotGate(this).out;

/// Logical bitwise AND.
Logic operator &(Logic other) => And2Gate(this, other).out;
Logic operator &(Logic other) {
if (this is Const &&
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I think this can be made a little more general? If either one is a Const, then you can do something special:

  • If one of the two is constant all 1's, then return the other
  • If one of the two is constant all 0's, then return 0

The current logic only covers if both are const.

You could remove some duplication in the implementation by making local variables to point to "the constant one" and "the other one", so you don't need to consider it both ways for all cases.

other is Const &&
value.isValid &&
other.value.isValid) {
if (value == LogicValue.of(0, width: width) ||
other.value == LogicValue.of(0, width: width)) {
return Const(LogicValue.of(0, width: width));
} else if (value == LogicValue.filled(width, LogicValue.one)) {
return other;
} else if (other.value == LogicValue.filled(width, LogicValue.one)) {
return this;
}
}
return And2Gate(this, other).out;
}

/// Logical bitwise OR.
Logic operator |(Logic other) => Or2Gate(this, other).out;
Logic operator |(Logic other) {
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same here for or

if (this is Const &&
other is Const &&
value.isValid &&
other.value.isValid) {
if (value == LogicValue.filled(width, LogicValue.one) ||
other.value == LogicValue.filled(width, LogicValue.one)) {
return Const(LogicValue.filled(width, LogicValue.one));
} else if (value == LogicValue.of(LogicValue.zero, width: width)) {
return other;
} else if (other.value == LogicValue.of(LogicValue.zero, width: width)) {
return this;
}
}
return Or2Gate(this, other).out;
}

/// Logical bitwise XOR.
Logic operator ^(Logic other) => Xor2Gate(this, other).out;
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109 changes: 109 additions & 0 deletions test/gate_test.dart
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Expand Up @@ -353,6 +353,115 @@ void main() {
});
});

group('Const input Gate test', () {
test('NotGate single bit Constant input', () async {
final a = Logic();
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naming the variables could be helpful for understanding the intent of the test, e.g. normalLogic, const0, etc.

final b = Const(LogicValue.zero, width: 1);
final c = Const(LogicValue.x, width: 1);
final d = Const(LogicValue.one, width: 1);
a.put(LogicValue.one);

expect(~b, isA<Const>());
expect((~b).value, equals(LogicValue.one));

expect(~c, isA<Const>());
expect((~c).value, equals(LogicValue.x));

expect(~d, isA<Const>());
expect((~d).value, equals(LogicValue.zero));
});

test('NotGate Multi bit Constant input', () async {
final b = Const(bin('1111'), width: 4);
final c = Const(bin('0100'), width: 4);

expect(~b, isA<Const>());
expect((~b).value, equals(LogicValue.of(LogicValue.zero, width: 4)));

expect(~c, isA<Logic>());
expect((~c).value, equals(LogicValue.of(11, width: 4)));
});

test('And2Gate Single bit Constant input', () async {
final a = Logic();
final b = Const(LogicValue.zero, width: 1);
final c = Const(LogicValue.x, width: 1);
final d = Const(LogicValue.one, width: 1);
a.put(LogicValue.one);

expect(a & b, isA<Logic>());
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anything & 0 should be a constant 0

expect((a & b).value, equals(LogicValue.zero));

expect(a & c, isA<Logic>());
expect((a & c).value, equals(LogicValue.x));

expect(b & c, isA<Logic>());
expect((b & c).value, equals(LogicValue.zero));

expect(a & d, isA<Logic>());
expect((a & d).value, equals(a.value));

expect(b & d, isA<Const>());
expect((b & d).value, equals(LogicValue.zero));
});

test('And2Gate Multi bit Constant input', () async {
final a = Const(LogicValue.of(LogicValue.zero, width: 4));
final b = Const('1111', width: 4);
final c = Const('0100', width: 4);
final d = Const(1, width: 32, fill: true);
final e = Const('10110', width: 32);
final z = Const('11111', width: 5);
final y = Const(LogicValue.of('11x01', width: 5));

expect(a & c, isA<Const>());
expect((a & c).value, equals(LogicValue.of(LogicValue.zero, width: 4)));

expect(b & c, isA<Logic>());
expect((b & c).value, equals(c.value));

expect(d & e, isA<Const>());
expect((d & e).value, equals(LogicValue.of('10110', width: 32)));

expect(y & z, isA<Logic>());
expect((y & z).value, equals(LogicValue.of('11x01', width: 5)));
});

test('OR2Gate Single bit Constant input', () async {
final a = Logic();
final b = Const(LogicValue.zero, width: 1);
final c = Const(LogicValue.x, width: 1);
final d = Const(LogicValue.one, width: 1);
final z = Const('11111', width: 5);
final y = Const(LogicValue.of('11x01', width: 5));
a.put(LogicValue.one);

expect(a | b, isA<Logic>());
expect((a | b).value, equals(a.value));

expect(a | c, isA<Logic>());
expect((a | c).value, equals(LogicValue.one));

expect(a | d, isA<Logic>());
expect((a | d).value, equals(LogicValue.one));
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anything | 1 should be 1


expect(y | z, isA<Logic>());
expect((y | z).value, equals(LogicValue.of('11111', width: 5)));
});

test('OR2Gate Multi bit Constant input', () async {
final a = Const(LogicValue.of(LogicValue.zero, width: 4));
final b = Const(bin('1111'), width: 4);
final c = Const(bin('0100'), width: 4);

expect(a | c, isA<Logic>());
expect((a | c).value, equals(c.value));

expect(b | c, isA<Const>());
expect((b | c).value, equals(LogicValue.filled(4, LogicValue.one)));
});
});

group('simcompare', () {
test('NotGate single bit', () async {
final gtm = GateTestModule(Logic(), Logic());
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