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update usages of allocreg to use the newer API
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@benjones @dlang-bot
benjones authored and dlang-bot committed Mar 27, 2024
1 parent 890fb95 commit 0141842
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Showing 8 changed files with 131 additions and 204 deletions.
27 changes: 10 additions & 17 deletions compiler/src/dmd/backend/cg87.d
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Original file line number Diff line number Diff line change
Expand Up @@ -852,8 +852,7 @@ void fixresult87(ref CodeBuilder cdb,elem *e,regm_t retregs, ref regm_t outretre
pop87();
cdb.genfltreg(ESC(mf,1),3,0);
genfwait(cdb);
reg_t reg;
allocreg(cdb,outretregs,reg,(sz == FLOATSIZE) ? TYfloat : TYdouble);
reg_t reg = allocreg(cdb,outretregs,(sz == FLOATSIZE) ? TYfloat : TYdouble);
if (sz == FLOATSIZE)
{
if (!I16)
Expand Down Expand Up @@ -918,8 +917,7 @@ void fixresult87(ref CodeBuilder cdb,elem *e,regm_t retregs, ref regm_t outretre
cdb.genfltreg(ESC(mf,1),3,0);
genfwait(cdb);
// MOVD XMM?,floatreg
reg_t reg;
allocreg(cdb,outretregs,reg,(sz == FLOATSIZE) ? TYfloat : TYdouble);
reg_t reg = allocreg(cdb,outretregs,(sz == FLOATSIZE) ? TYfloat : TYdouble);
cdb.genxmmreg(xmmload(tym),reg,0,tym);
}
else
Expand Down Expand Up @@ -2974,10 +2972,9 @@ private void cdd_u64_I32(ref CodeBuilder cdb, elem *e, regm_t *pretregs)
retregs = *pretregs;
if (!retregs)
retregs = ALLREGS;
reg_t reg, reg2;
allocreg(cdb,retregs,reg,tym);
reg_t reg = allocreg(cdb,retregs,tym);
reg = findreglsw(retregs);
reg2 = findregmsw(retregs);
reg_t reg2 = findregmsw(retregs);
movregconst(cdb,reg2,0x80000000,0);
getregs(cdb,mask(reg2) | mAX);

Expand Down Expand Up @@ -3059,11 +3056,9 @@ private void cdd_u64_I64(ref CodeBuilder cdb, elem *e, regm_t *pretregs)
retregs = *pretregs;
if (!retregs)
retregs = ALLREGS;
reg_t reg;
allocreg(cdb,retregs,reg,tym);
reg_t reg = allocreg(cdb,retregs,tym);
regm_t regm2 = ALLREGS & ~retregs & ~mAX;
reg_t reg2;
allocreg(cdb,regm2,reg2,tym);
reg_t reg2 = allocreg(cdb,regm2,tym);
movregconst(cdb,reg2,0x80000000,0);
getregs(cdb,mask(reg2) | mAX);

Expand Down Expand Up @@ -3133,8 +3128,7 @@ void cdd_u32(ref CodeBuilder cdb, elem *e, regm_t *pretregs)
retregs = *pretregs & ALLREGS;
if (!retregs)
retregs = ALLREGS;
reg_t reg;
allocreg(cdb,retregs,reg,tym);
reg_t reg = allocreg(cdb,retregs,tym);

cdb.genfltreg(0xC7,0,8);
code *cf3 = cdb.last();
Expand Down Expand Up @@ -3261,7 +3255,7 @@ void cnvt87(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = *pretregs & (ALLREGS | mBP);
if (!retregs)
retregs = ALLREGS;
allocreg(cdb,retregs,reg,tym);
reg = allocreg(cdb,retregs,tym);

genfwait(cdb); // FWAIT
cdb.genc1(0xD9,modregrm(2,5,4) + 256*modregrm(0,4,SP),FLconst,szoff); // FLDCW szoff[ESP]
Expand Down Expand Up @@ -3293,7 +3287,7 @@ void cnvt87(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = *pretregs & (ALLREGS | mBP);
if (!retregs)
retregs = ALLREGS;
allocreg(cdb,retregs,reg,tym);
reg = allocreg(cdb,retregs,tym);

genfwait(cdb);

Expand Down Expand Up @@ -3350,8 +3344,7 @@ void cdrndtol(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = *pretregs & (ALLREGS | mBP);
if (!retregs)
retregs = ALLREGS;
reg_t reg;
allocreg(cdb,retregs,reg,tym);
reg_t reg = allocreg(cdb,retregs,tym);
genfwait(cdb); // FWAIT
if (tysize(tym) > REGSIZE)
{
Expand Down
20 changes: 6 additions & 14 deletions compiler/src/dmd/backend/cgcod.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1638,12 +1638,6 @@ static if (0)
* Returns:
* Register number of first allocated register
*/

void allocreg(ref CodeBuilder cdb,ref regm_t outretregs,out reg_t outreg,tym_t tym)
{
outreg = allocreg(cdb, outretregs, tym, __LINE__, __FILE__);
}

reg_t allocreg(ref CodeBuilder cdb,ref regm_t outretregs,tym_t tym){
return allocreg(cdb, outretregs, tym, __LINE__, __FILE__);
}
Expand Down Expand Up @@ -1840,9 +1834,7 @@ L3:
@trusted
reg_t allocScratchReg(ref CodeBuilder cdb, regm_t regm)
{
reg_t r;
allocreg(cdb, regm, r, TYoffset);
return r;
return allocreg(cdb, regm, TYoffset);
}


Expand Down Expand Up @@ -2238,7 +2230,7 @@ private void comsub(ref CodeBuilder cdb,elem *e, ref regm_t pretregs)
retregs = BYTEREGS;
else if (!(retregs & allregs))
retregs = allregs;
allocreg(cdb,retregs,reg,tym);
reg = allocreg(cdb,retregs,tym);
code *cr = &cse.csimple;
cr.setReg(reg);
if (I64 && reg >= 4 && tysize(cse.e.Ety) == 1)
Expand All @@ -2255,7 +2247,7 @@ private void comsub(ref CodeBuilder cdb,elem *e, ref regm_t pretregs)
if (config.fpxmmregs && (tyxmmreg(cse.e.Ety) || tyvector(cse.e.Ety)))
{
retregs = XMMREGS;
allocreg(cdb,retregs,reg,tym);
reg = allocreg(cdb,retregs,tym);
gen_loadcse(cdb, cse.e.Ety, reg, cse.slot);
regcon.cse.mval |= mask(reg); // cs is in a reg
regcon.cse.value[reg] = e;
Expand All @@ -2272,7 +2264,7 @@ private void comsub(ref CodeBuilder cdb,elem *e, ref regm_t pretregs)
retregs = pretregs;
if (byte_ && !(retregs & BYTEREGS))
retregs = BYTEREGS;
allocreg(cdb,retregs,reg,tym);
reg = allocreg(cdb,retregs,tym);
gen_loadcse(cdb, cse.e.Ety, reg, cse.slot);
L10:
regcon.cse.mval |= mask(reg); // cs is in a reg
Expand Down Expand Up @@ -2320,7 +2312,7 @@ private void comsub(ref CodeBuilder cdb,elem *e, ref regm_t pretregs)
{
if (!regm)
regm = mMSW & ALLREGS;
allocreg(cdb,regm,msreg,TYint);
msreg = allocreg(cdb,regm,TYint);
loadcse(cdb,e,msreg,mMSW);
}

Expand All @@ -2333,7 +2325,7 @@ private void comsub(ref CodeBuilder cdb,elem *e, ref regm_t pretregs)
{
if (!regm)
regm = mLSW;
allocreg(cdb,regm,lsreg,TYint);
lsreg = allocreg(cdb,regm,TYint);
loadcse(cdb,e,lsreg,mLSW | mBP);
}

Expand Down
2 changes: 1 addition & 1 deletion compiler/src/dmd/backend/cgen.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ void regwithvalue(ref CodeBuilder cdb,regm_t regm,targ_size_t value, out reg_t p
return; // already have a register with the right value in it

regm_t save = regcon.immed.mval;
allocreg(cdb,regm,preg,TYint); // allocate register
preg = allocreg(cdb,regm,TYint); // allocate register
regcon.immed.mval = save;
movregconst(cdb,preg,value,flags); // store value into reg
}
Expand Down
58 changes: 20 additions & 38 deletions compiler/src/dmd/backend/cgxmm.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -114,9 +114,8 @@ void movxmmconst(ref CodeBuilder cdb, reg_t xreg, tym_t ty, eve* pev, regm_t fla

if (I32 && sz == 8)
{
reg_t r;
regm_t rm = ALLREGS;
allocreg(cdb,rm,r,TYint); // allocate scratch register
reg_t r = allocreg(cdb,rm,TYint); // allocate scratch register
static union U { targ_size_t s; targ_long[2] l; }
U u = void;
u.l[1] = 0;
Expand Down Expand Up @@ -187,9 +186,8 @@ void orthxmm(ref CodeBuilder cdb, elem *e, regm_t *pretregs)
if (e.Eoper == OPmin)
{
regm_t nretregs = XMMREGS & ~retregs;
reg_t sreg; // hold sign bit
reg_t sreg = allocreg(cdb,nretregs,e2.Ety); // hold sign bit
const uint sz = tysize(e1.Ety);
allocreg(cdb,nretregs,sreg,e2.Ety);
eve signbit;
signbit.Vint = 0x80000000;
if (sz == 8)
Expand Down Expand Up @@ -510,8 +508,7 @@ void xmmcnvt(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = ALLREGS;
}

reg_t rreg;
allocreg(cdb,retregs,rreg,ty);
reg_t rreg = allocreg(cdb,retregs,ty);
if (isXMMreg(rreg))
rreg -= XMM0;

Expand Down Expand Up @@ -567,7 +564,7 @@ void xmmopass(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = *pretregs & XMMREGS & ~rretregs;
if (!retregs)
retregs = XMMREGS & ~rretregs;
allocreg(cdb,retregs,reg,ty1);
reg = allocreg(cdb,retregs,ty1);
cs.Iop = xmmload(ty1, true); // MOVSD xmm,xmm_m64
code_newreg(&cs,reg - XMM0);
cdb.gen(&cs);
Expand Down Expand Up @@ -636,7 +633,7 @@ void xmmpost(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
retregs = XMMREGS & ~*pretregs;
if (!retregs)
retregs = XMMREGS;
allocreg(cdb,retregs,reg,ty1);
reg = allocreg(cdb,retregs,ty1);
cs.Iop = xmmload(ty1, true); // MOVSD xmm,xmm_m64
code_newreg(&cs,reg - XMM0);
cdb.gen(&cs);
Expand All @@ -647,8 +644,7 @@ void xmmpost(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
regm_t resultregs = XMMREGS & *pretregs & ~retregs;
if (!resultregs)
resultregs = XMMREGS & ~retregs;
reg_t resultreg;
allocreg(cdb,resultregs, resultreg, ty1);
reg_t resultreg = allocreg(cdb,resultregs, ty1);

cdb.gen2(xmmload(ty1,true),modregxrmx(3,resultreg-XMM0,reg-XMM0)); // MOVSS/D resultreg,reg
checkSetVex(cdb.last(), ty1);
Expand Down Expand Up @@ -709,8 +705,7 @@ void xmmneg(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
getregs(cdb,retregs);
const reg = findreg(retregs);
regm_t rretregs = XMMREGS & ~retregs;
reg_t rreg;
allocreg(cdb,rretregs,rreg,tyml);
reg_t rreg = allocreg(cdb,rretregs,tyml);

eve signbit;
signbit.Vint = 0x80000000;
Expand Down Expand Up @@ -751,8 +746,7 @@ void xmmabs(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
getregs(cdb,retregs);
const reg = findreg(retregs);
regm_t rretregs = XMMREGS & ~retregs;
reg_t rreg;
allocreg(cdb,rretregs,rreg,tyml);
reg_t rreg = allocreg(cdb,rretregs,tyml);

eve mask;
mask.Vint = 0x7FFF_FFFF;
Expand Down Expand Up @@ -1298,8 +1292,7 @@ static if (0)
retregs = *pretregs & XMMREGS;
if (!retregs)
retregs = XMMREGS;
reg_t reg;
allocreg(cdb,retregs, reg, e.Ety);
reg_t reg = allocreg(cdb,retregs, e.Ety);
code_newreg(&cs, reg - XMM0);
cs.Iop = op;
cdb.gen(&cs);
Expand Down Expand Up @@ -1485,8 +1478,7 @@ static if (0)
// VBROADCASTSS X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VBROADCASTSS;
cs.Irex &= ~REX_W;
code_newreg(&cs,reg - XMM0);
Expand Down Expand Up @@ -1526,8 +1518,7 @@ static if (0)
// VBROADCASTSD YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VBROADCASTSD;
cs.Irex &= ~REX_W;
code_newreg(&cs,reg - XMM0);
Expand Down Expand Up @@ -1569,8 +1560,7 @@ static if (0)
// VPBROADCASTB X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VPBROADCASTB;
cs.Irex &= ~REX_W;
code_newreg(&cs,reg - XMM0);
Expand All @@ -1583,8 +1573,7 @@ static if (0)
codelem(cdb,e1,&regm,true); // eval left leaf
const r = findreg(regm);

reg_t reg;
allocreg(cdb,retregs,reg, e.Ety);
reg_t reg = allocreg(cdb,retregs, e.Ety);
reg -= XMM0;
// (V)MOVD reg,r
cdb.gen2(LODD,modregxrmx(3,reg,r));
Expand All @@ -1599,10 +1588,9 @@ static if (0)
{
if (config.avx)
{
reg_t zeroreg;
regm = XMMREGS & ~retregs;
// VPXOR XMM1,XMM1,XMM1
allocreg(cdb,regm,zeroreg, ty);
reg_t zeroreg = allocreg(cdb,regm, ty);
zeroreg -= XMM0;
cdb.gen2(PXOR, modregxrmx(3,zeroreg,zeroreg));
checkSetVex(cdb.last(), TYuchar16); // AVX-128
Expand Down Expand Up @@ -1638,8 +1626,7 @@ static if (0)
// VPBROADCASTW X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VPBROADCASTW;
cs.Irex &= ~REX_W;
cs.Iflags &= ~CFopsize;
Expand All @@ -1653,8 +1640,7 @@ static if (0)
codelem(cdb,e1,&regm,true); // eval left leaf
reg_t r = findreg(regm);

reg_t reg;
allocreg(cdb,retregs,reg, e.Ety);
reg_t reg = allocreg(cdb,retregs, e.Ety);
reg -= XMM0;
// (V)MOVD reg,r
cdb.gen2(LODD,modregxrmx(3,reg,r));
Expand Down Expand Up @@ -1692,8 +1678,7 @@ static if (0)
// VPBROADCASTD/VBROADCASTSS X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = config.avx >= 2 ? VPBROADCASTD : VBROADCASTSS;
cs.Irex &= ~REX_W;
code_newreg(&cs,reg - XMM0);
Expand Down Expand Up @@ -1735,8 +1720,7 @@ static if (0)
// VPBROADCASTQ/VBROADCASTSD/(V)PUNPCKLQDQ X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg;
allocreg(cdb,retregs,reg,ty);
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = config.avx >= 2 ? VPBROADCASTQ : tysize(ty) == 32 ? VBROADCASTSD : PUNPCKLQDQ;
cs.Irex &= ~REX_W;
code_newreg(&cs,reg - XMM0);
Expand Down Expand Up @@ -1945,14 +1929,12 @@ void cloadxmm(ref CodeBuilder cdb, elem *e, regm_t *pretregs)
opcode_t opmv = xmmload(tym, xmmIsAligned(e));

regm_t retregs0 = mXMM0;
reg_t reg0;
allocreg(cdb, retregs0, reg0, ty);
reg_t reg0 = allocreg(cdb, retregs0, ty);
loadea(cdb, e, &cs, opmv, reg0, 0, RMload, 0); // MOVSS/MOVSD XMM0,data
checkSetVex(cdb.last(), ty);

regm_t retregs1 = mXMM1;
reg_t reg1;
allocreg(cdb, retregs1, reg1, ty);
reg_t reg1 = allocreg(cdb, retregs1, ty);
loadea(cdb, e, &cs, opmv, reg1, tysize(ty), RMload, mXMM0); // MOVSS/MOVSD XMM1,data+offset
checkSetVex(cdb.last(), ty);

Expand Down
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