Issues when simulating CSRNG and ENTROPY_SOURCE

[diswd]

Hello everyone! I am now trying to simulate CSRNG and ENTROPY_SOURCE , but I meet two issues when I used the testbench which had provided in src to simulate them.

1. For CSRNG, it has the issue "caliptra_prim_xor2 is missing". I do not find this file in src, but now I have write a "caliptra_prim_xor2" and after I add this file in Caliptra, the CSRNG can be simulated successfully. The code below is the "caliptra_prim_xor2" I have wirte. Maybe you can check it.
   module caliptra_prim_xor2 #(
   parameter Width = 2
   )
   (
   input logic [Width-1:0] in0_i,
   input logic [Width-1:0] in1_i,
   output logic [Width-1:0] out_o

);
assign out_o = in0_i ^ in1_i;

endmodule

2. For ENTROPY_SOURCE, it has the issue "Identifier not declared ./kmac/rtl/sha3pad.sv 854 Identifier 'strong' has not been declared yet". I tried to fix it, although I can though the compiling and simulating and get the wave, I cannot get the output entropy bit. It seems that the ENTROPY_SOURCE does not work normally.

The tool I used is vcs and verdi(version 2018). Could you please help me solve the issues. Thank you very much!

[calebofearth]

Hi @diswd

1. In Caliptra, none of the parameters are set to enable code that requires caliptra_prim_xor2, so it doesn't cause any problems in our simulation or synthesis flows. The file should be unused and thus this code should be ignored in synthesis.
   @howardtr please chime in if you have additional insights. Should we bring this file over? Looks like this is the original: https://github.com/lowRISC/opentitan/blob/master/hw/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv

2. The keyword strong is used as part of an assertion property here. Most of our assertion macros are wrapped with a protection ifdef CLP_ASSERT_ON (e.g. CALIPTRA_ASSERT) but this protector is not applied to the CALIPTRA_ASSUME macro in this case. Assertion properties should be disabled for synthesis.

[diswd]

Hi @diswd

1. In Caliptra, none of the parameters are set to enable code that requires caliptra_prim_xor2, so it doesn't cause any problems in our simulation or synthesis flows. The file should be unused and thus this code should be ignored in synthesis.
   @howardtr please chime in if you have additional insights. Should we bring this file over? Looks like this is the original: https://github.com/lowRISC/opentitan/blob/master/hw/ip/prim_xilinx/rtl/prim_xilinx_xor2.sv
2. The keyword strong is used as part of an assertion property here. Most of our assertion macros are wrapped with a protection ifdef CLP_ASSERT_ON (e.g. CALIPTRA_ASSERT) but this protector is not applied to the CALIPTRA_ASSUME macro in this case. Assertion properties should be disabled for synthesis.

Thanks for your reply! I still have one question. For ENTROPY_SOURCE, I have read the bypass mode entropy bit from the register ENTROPY_DATA through AHB_lite successfully.But when I tried to read FIPS compliant entropy in the same way, the Interrupt "ES_ENTROPY_VALID " can not be pull up, so I cannot read the entropy bit from the reg ENTROPY_DATA. I follow the following steps to configure the registers:

1. Set the ENTROPY_DATA_REG_ENABLE field and FIPS_ENABLE field in the [CONF] register to kMultiBitBool4True.
2. Set the ES_ROUTE field in the [ENTROPY_CONTROL] register to kMultiBitBool4True.
3. Set the ES_ENTROPY_VALID field in the [INTERRUPT_ENABLE] register to 1.
4. Set the MODULE_ENABLE field in the [MODULE_ENABLE] register to kMultiBitBool4True.

I think I have set the registers in correct steps, but the Interrupt "ES_ENTROPY_VALID " still zero,I cannot read any FIPS compliant entropy bit from the register ENTROPY_DATA. Could you please tell me the reason? Thank you very much!