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Merge pull request #71 from MikroElektronika/STM32L4-AI_json_fix/ivan…
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….ruzavin

Fixed jsons for new L4 MCUs
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@StrahinjaJacimovic
StrahinjaJacimovic authored Jul 8, 2024
2 parents 682bf8f + 3ff0c77 commit a162846
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Showing 18 changed files with 126 additions and 126 deletions.
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5AE.json
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},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
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},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
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},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
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},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
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},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
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},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
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"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5AE",
"clock": 4
"clock": 120
}
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5AG.json
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Expand Up @@ -40,7 +40,7 @@
},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
Expand Down Expand Up @@ -142,7 +142,7 @@
},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
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},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
Expand Down Expand Up @@ -476,7 +476,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
Expand Down Expand Up @@ -760,7 +760,7 @@
},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
Expand Down Expand Up @@ -1322,7 +1322,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
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"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5AG",
"clock": 4
"clock": 120
}
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5CE.json
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Expand Up @@ -40,7 +40,7 @@
},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
Expand Down Expand Up @@ -142,7 +142,7 @@
},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
Expand Down Expand Up @@ -250,7 +250,7 @@
},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
Expand Down Expand Up @@ -476,7 +476,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
Expand Down Expand Up @@ -760,7 +760,7 @@
},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
Expand Down Expand Up @@ -1322,7 +1322,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
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"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5CE",
"clock": 4
"clock": 120
}
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5CG.json
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Expand Up @@ -40,7 +40,7 @@
},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
Expand Down Expand Up @@ -142,7 +142,7 @@
},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
Expand Down Expand Up @@ -250,7 +250,7 @@
},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
Expand Down Expand Up @@ -476,7 +476,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
Expand Down Expand Up @@ -760,7 +760,7 @@
},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
Expand Down Expand Up @@ -1322,7 +1322,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
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"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5CG",
"clock": 4
"clock": 120
}
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5QE.json
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Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@
},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
Expand Down Expand Up @@ -142,7 +142,7 @@
},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
Expand Down Expand Up @@ -250,7 +250,7 @@
},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
Expand Down Expand Up @@ -476,7 +476,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
Expand Down Expand Up @@ -760,7 +760,7 @@
},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
Expand Down Expand Up @@ -1322,7 +1322,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
Expand Down Expand Up @@ -1656,5 +1656,5 @@
"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5QE",
"clock": 4
"clock": 120
}
14 changes: 7 additions & 7 deletions ARM/gcc_clang/def/STM32L4P5QG.json
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Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@
},
{
"hidden": false,
"init": "0",
"init": "1000000",
"key": "PLLON",
"label": "Main PLL enable",
"mask": "1000000",
Expand Down Expand Up @@ -142,7 +142,7 @@
},
{
"hidden": false,
"init": "0",
"init": "100",
"key": "HSION",
"label": "HSI clock enable",
"mask": "100",
Expand Down Expand Up @@ -250,7 +250,7 @@
},
{
"hidden": false,
"init": "00000001",
"init": "0",
"key": "MSION",
"label": "MSI clock enable",
"mask": "1",
Expand Down Expand Up @@ -476,7 +476,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "3",
"key": "SW",
"label": "System clock switch",
"mask": "3",
Expand Down Expand Up @@ -760,7 +760,7 @@
},
{
"hidden": false,
"init": "00001000",
"init": "00000f00",
"key": "PLLN",
"label": "Main PLL multiplication factor for VCO",
"mask": "7f00",
Expand Down Expand Up @@ -1322,7 +1322,7 @@
},
{
"hidden": false,
"init": "00000000",
"init": "2",
"key": "PLLSRC",
"label": "Main PLL, PLLSAI1 and PLLSAI2 entry clock source",
"mask": "3",
Expand Down Expand Up @@ -1656,5 +1656,5 @@
"core": "M4EF",
"delay_src_path": "delays/m4ef/__lib_delays.c",
"mcu": "STM32L4P5QG",
"clock": 4
"clock": 120
}
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