Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Create PACs for the RISC-V low-power coprocessors #135

Closed
3 tasks done
jessebraham opened this issue Jul 6, 2023 · 2 comments
Closed
3 tasks done

Create PACs for the RISC-V low-power coprocessors #135

jessebraham opened this issue Jul 6, 2023 · 2 comments
Assignees
@jessebraham
Labels
chip support Add support for a new device

Comments

@jessebraham
Copy link
Member

jessebraham commented Jul 6, 2023 •
edited
Loading

The ESP32-S2/S3 have a rather limited RISC-V ULP core, where as the ESP32-C6 has a much more capable RISC-V LP core.

  • ESP32-C6
  • ESP32-S2
  • ESP32-S3
@jessebraham jessebraham added the chip support Add support for a new device label Jul 6, 2023
@jessebraham jessebraham self-assigned this Jul 6, 2023
@jessebraham jessebraham pinned this issue Jul 6, 2023
@jessebraham jessebraham linked a pull request Jul 6, 2023 that will close this issue
Create PACs for the ESP32-S2/S3's RISC-V ULP coprocessors #136
Merged
@jessebraham jessebraham removed a link to a pull request Jul 6, 2023
Create PACs for the ESP32-S2/S3's RISC-V ULP coprocessors #136
Merged
@jessebraham
Copy link
Member Author

ESP32-S2/S3 added in #136

@jessebraham
Copy link
Member Author

ESP32-C6 added in #137

@jessebraham jessebraham unpinned this issue Jul 10, 2023
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees

@jessebraham jessebraham

Labels
chip support Add support for a new device
Projects
esp-rs
Archived in project
Milestone
No milestone
Development

No branches or pull requests
1 participant
@jessebraham