diff --git a/lib/SPIRV/OCLUtil.cpp b/lib/SPIRV/OCLUtil.cpp
index 2bfb0b5d1f..87f648209f 100644
--- a/lib/SPIRV/OCLUtil.cpp
+++ b/lib/SPIRV/OCLUtil.cpp
@@ -987,7 +987,9 @@ class OCLBuiltinFuncMangleInfo : public SPIRV::BuiltinFuncMangleInfo {
     if (NameRef.startswith("async_work_group")) {
       addUnsignedArg(-1);
       setArgAttr(1, SPIR::ATTR_CONST);
-    } else if (NameRef.startswith("write_imageui"))
+    } else if (NameRef.startswith("printf"))
+      setVarArg(1);
+    else if (NameRef.startswith("write_imageui"))
       addUnsignedArg(2);
     else if (NameRef.equals("prefetch")) {
       addUnsignedArg(1);
diff --git a/lib/SPIRV/SPIRVInternal.h b/lib/SPIRV/SPIRVInternal.h
index 8c0c5ce287..9511360938 100644
--- a/lib/SPIRV/SPIRVInternal.h
+++ b/lib/SPIRV/SPIRVInternal.h
@@ -982,6 +982,10 @@ template <> inline void SPIRVMap<std::string, Op, SPIRVOpaqueType>::init() {
 // Check if the module contains llvm.loop.* metadata
 bool hasLoopMetadata(const Module *M);
 
+// Check if CI is a call to instruction from OpenCL Extended Instruction Set.
+// If so, return it's extended opcode in ExtOp.
+bool isSPIRVOCLExtInst(const CallInst *CI, OCLExtOpKind *ExtOp);
+
 // check LLVM Intrinsics type(s) for validity
 bool checkTypeForSPIRVExtendedInstLowering(IntrinsicInst *II, SPIRVModule *BM);
 } // namespace SPIRV
diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp
index 3707bcafa5..7696990c1a 100644
--- a/lib/SPIRV/SPIRVReader.cpp
+++ b/lib/SPIRV/SPIRVReader.cpp
@@ -4224,88 +4224,25 @@ bool SPIRVToLLVM::transAlign(SPIRVValue *BV, Value *V) {
   return true;
 }
 
-void SPIRVToLLVM::transOCLVectorLoadStore(std::string &UnmangledName,
-                                          std::vector<SPIRVWord> &BArgs) {
-  if (UnmangledName.find("vload") == 0 &&
-      UnmangledName.find("n") != std::string::npos) {
-    if (BArgs.back() != 1) {
-      std::stringstream SS;
-      SS << BArgs.back();
-      UnmangledName.replace(UnmangledName.find("n"), 1, SS.str());
-    } else {
-      UnmangledName.erase(UnmangledName.find("n"), 1);
-    }
-    BArgs.pop_back();
-  } else if (UnmangledName.find("vstore") == 0) {
-    if (UnmangledName.find("n") != std::string::npos) {
-      auto T = BM->getValueType(BArgs[0]);
-      if (T->isTypeVector()) {
-        auto W = T->getVectorComponentCount();
-        std::stringstream SS;
-        SS << W;
-        UnmangledName.replace(UnmangledName.find("n"), 1, SS.str());
-      } else {
-        UnmangledName.erase(UnmangledName.find("n"), 1);
-      }
-    }
-    if (UnmangledName.find("_r") != std::string::npos) {
-      UnmangledName.replace(
-          UnmangledName.find("_r"), 2,
-          std::string("_") +
-              SPIRSPIRVFPRoundingModeMap::rmap(
-                  static_cast<SPIRVFPRoundingModeKind>(BArgs.back())));
-      BArgs.pop_back();
-    }
-  }
-}
-
-// printf is not mangled. The function type should have just one argument.
-// read_image*: the second argument should be mangled as sampler.
 Instruction *SPIRVToLLVM::transOCLBuiltinFromExtInst(SPIRVExtInst *BC,
                                                      BasicBlock *BB) {
   assert(BB && "Invalid BB");
-  std::string MangledName;
-  SPIRVWord EntryPoint = BC->getExtOp();
-  std::string UnmangledName;
-  std::vector<SPIRVWord> BArgs = BC->getArguments();
+  auto ExtOp = static_cast<OCLExtOpKind>(BC->getExtOp());
+  std::string UnmangledName = OCLExtOpMap::map(ExtOp);
 
   assert(BM->getBuiltinSet(BC->getExtSetId()) == SPIRVEIS_OpenCL &&
          "Not OpenCL extended instruction");
 
-  bool IsPrintf = (EntryPoint == OpenCLLIB::Printf);
-  UnmangledName = OCLExtOpMap::map(static_cast<OCLExtOpKind>(EntryPoint));
-
-  SPIRVDBG(spvdbgs() << "[transOCLBuiltinFromExtInst] OrigUnmangledName: "
-                     << UnmangledName << '\n');
-  transOCLVectorLoadStore(UnmangledName, BArgs);
-
-  std::vector<Type *> ArgTypes = transTypeVector(BC->getValueTypes(BArgs));
-
-  // TODO: we should always produce SPIR-V friendly IR and apply lowering
-  // later if needed
-  if (IsPrintf) {
-    ArgTypes.resize(1);
-  }
-
+  std::vector<Type *> ArgTypes = transTypeVector(BC->getArgTypes());
   Type *RetTy = transType(BC->getType());
-  if (BM->getDesiredBIsRepresentation() != BIsRepresentation::SPIRVFriendlyIR) {
-    // Convert extended instruction into an OpenCL built-in
-    if (IsPrintf) {
-      MangledName = "printf";
-    } else {
-      mangleOpenClBuiltin(UnmangledName, ArgTypes, MangledName);
-    }
-  } else {
-    MangledName = getSPIRVFriendlyIRFunctionName(
-        static_cast<OCLExtOpKind>(EntryPoint), ArgTypes, RetTy);
-  }
+  std::string MangledName =
+      getSPIRVFriendlyIRFunctionName(ExtOp, ArgTypes, RetTy);
 
-  SPIRVDBG(spvdbgs() << "[transOCLBuiltinFromExtInst] ModifiedUnmangledName: "
+  SPIRVDBG(spvdbgs() << "[transOCLBuiltinFromExtInst] UnmangledName: "
                      << UnmangledName << " MangledName: " << MangledName
                      << '\n');
 
-  FunctionType *FT = FunctionType::get(RetTy, ArgTypes,
-                                       /* IsVarArg */ IsPrintf);
+  FunctionType *FT = FunctionType::get(RetTy, ArgTypes, false);
   Function *F = M->getFunction(MangledName);
   if (!F) {
     F = Function::Create(FT, GlobalValue::ExternalLinkage, MangledName, M);
@@ -4315,17 +4252,17 @@ Instruction *SPIRVToLLVM::transOCLBuiltinFromExtInst(SPIRVExtInst *BC,
     if (isFuncReadNone(UnmangledName))
       F->addFnAttr(Attribute::ReadNone);
   }
-  auto Args = transValue(BC->getValues(BArgs), F, BB);
+  auto Args = transValue(BC->getArgValues(), F, BB);
   SPIRVDBG(dbgs() << "[transOCLBuiltinFromExtInst] Function: " << *F
                   << ", Args: ";
            for (auto &I
                 : Args) dbgs()
            << *I << ", ";
            dbgs() << '\n');
-  CallInst *Call = CallInst::Create(F, Args, BC->getName(), BB);
-  setCallingConv(Call);
-  addFnAttr(Call, Attribute::NoUnwind);
-  return transOCLBuiltinPostproc(BC, Call, BB, UnmangledName);
+  CallInst *CI = CallInst::Create(F, Args, BC->getName(), BB);
+  setCallingConv(CI);
+  addFnAttr(CI, Attribute::NoUnwind);
+  return CI;
 }
 
 // SPIR-V only contains language version. Use OpenCL language version as
diff --git a/lib/SPIRV/SPIRVReader.h b/lib/SPIRV/SPIRVReader.h
index 20724c5a9f..732ee6c2ed 100644
--- a/lib/SPIRV/SPIRVReader.h
+++ b/lib/SPIRV/SPIRVReader.h
@@ -123,8 +123,6 @@ class SPIRVToLLVM {
                                     SPIRVInstruction *BI, BasicBlock *BB);
   Instruction *transOCLBuiltinFromInst(SPIRVInstruction *BI, BasicBlock *BB);
   Instruction *transSPIRVBuiltinFromInst(SPIRVInstruction *BI, BasicBlock *BB);
-  void transOCLVectorLoadStore(std::string &UnmangledName,
-                               std::vector<SPIRVWord> &BArgs);
 
   /// Post-process translated LLVM module for OpenCL.
   bool postProcessOCL();
diff --git a/lib/SPIRV/SPIRVToOCL.cpp b/lib/SPIRV/SPIRVToOCL.cpp
index 58e9cbbb33..c4b424d42e 100644
--- a/lib/SPIRV/SPIRVToOCL.cpp
+++ b/lib/SPIRV/SPIRVToOCL.cpp
@@ -53,6 +53,32 @@ void SPIRVToOCL::visitCallInst(CallInst &CI) {
   if (!F)
     return;
 
+  OCLExtOpKind ExtOp;
+  if (isSPIRVOCLExtInst(&CI, &ExtOp)) {
+    switch (ExtOp) {
+    case OpenCLLIB::Vloadn:
+    case OpenCLLIB::Vloada_halfn:
+    case OpenCLLIB::Vload_halfn:
+      visitCallSPIRVVLoadn(&CI, ExtOp);
+      break;
+    case OpenCLLIB::Vstoren:
+    case OpenCLLIB::Vstore_halfn:
+    case OpenCLLIB::Vstorea_halfn:
+    case OpenCLLIB::Vstore_half_r:
+    case OpenCLLIB::Vstore_halfn_r:
+    case OpenCLLIB::Vstorea_halfn_r:
+      visitCallSPIRVVStore(&CI, ExtOp);
+      break;
+    case OpenCLLIB::Printf:
+      visitCallSPIRVPrintf(&CI, ExtOp);
+      break;
+    default:
+      visitCallSPIRVOCLExt(&CI, ExtOp);
+      break;
+    }
+    return;
+  }
+
   auto MangledName = F->getName();
   StringRef DemangledName;
   Op OC = OpNop;
@@ -648,6 +674,89 @@ void SPIRVToOCL::visitCallSPIRVBuiltin(CallInst *CI, Op OC) {
       &Attrs);
 }
 
+void SPIRVToOCL::visitCallSPIRVOCLExt(CallInst *CI, OCLExtOpKind Kind) {
+  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
+  mutateCallInstOCL(
+      M, CI,
+      [=](CallInst *, std::vector<Value *> &Args) {
+        return OCLExtOpMap::map(Kind);
+      },
+      &Attrs);
+}
+
+void SPIRVToOCL::visitCallSPIRVVLoadn(CallInst *CI, OCLExtOpKind Kind) {
+  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
+  mutateCallInstOCL(
+      M, CI,
+      [=](CallInst *, std::vector<Value *> &Args) {
+        std::string Name = OCLExtOpMap::map(Kind);
+        if (ConstantInt *C = dyn_cast<ConstantInt>(Args.back())) {
+          uint64_t NumComponents = C->getZExtValue();
+          std::stringstream SS;
+          SS << NumComponents;
+          Name.replace(Name.find("n"), 1, SS.str());
+        }
+        Args.pop_back();
+        return Name;
+      },
+      &Attrs);
+}
+
+void SPIRVToOCL::visitCallSPIRVVStore(CallInst *CI, OCLExtOpKind Kind) {
+  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
+  mutateCallInstOCL(
+      M, CI,
+      [=](CallInst *, std::vector<Value *> &Args) {
+        std::string Name = OCLExtOpMap::map(Kind);
+        if (Kind == OpenCLLIB::Vstore_half_r ||
+            Kind == OpenCLLIB::Vstore_halfn_r ||
+            Kind == OpenCLLIB::Vstorea_halfn_r) {
+          auto C = cast<ConstantInt>(Args.back());
+          auto RoundingMode =
+              static_cast<SPIRVFPRoundingModeKind>(C->getZExtValue());
+          Name.replace(Name.find("_r"), 2,
+                       std::string("_") +
+                           SPIRSPIRVFPRoundingModeMap::rmap(RoundingMode));
+          Args.pop_back();
+        }
+
+        if (Kind == OpenCLLIB::Vstore_halfn ||
+            Kind == OpenCLLIB::Vstore_halfn_r ||
+            Kind == OpenCLLIB::Vstorea_halfn ||
+            Kind == OpenCLLIB::Vstorea_halfn_r || Kind == OpenCLLIB::Vstoren) {
+          if (auto DataType = dyn_cast<VectorType>(Args[0]->getType())) {
+            uint64_t NumElements = DataType->getElementCount().getValue();
+            assert((NumElements == 2 || NumElements == 3 || NumElements == 4 ||
+                    NumElements == 8 || NumElements == 16) &&
+                   "Unsupported vector size for vstore instruction!");
+            std::stringstream SS;
+            SS << NumElements;
+            Name.replace(Name.find("n"), 1, SS.str());
+          }
+        }
+
+        return Name;
+      },
+      &Attrs);
+}
+
+void SPIRVToOCL::visitCallSPIRVPrintf(CallInst *CI, OCLExtOpKind Kind) {
+  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
+  CallInst *NewCI = mutateCallInstOCL(
+      M, CI,
+      [=](CallInst *, std::vector<Value *> &Args) {
+        return OCLExtOpMap::map(OpenCLLIB::Printf);
+      },
+      &Attrs);
+
+  // Clang represents printf function without mangling
+  std::string TargetName = "printf";
+  if (Function *F = M->getFunction(TargetName))
+    NewCI->setCalledFunction(F);
+  else
+    NewCI->getCalledFunction()->setName(TargetName);
+}
+
 std::string SPIRVToOCL::getGroupBuiltinPrefix(CallInst *CI) {
   std::string Prefix;
   auto ES = getArgAsScope(CI, 0);
diff --git a/lib/SPIRV/SPIRVToOCL.h b/lib/SPIRV/SPIRVToOCL.h
index baecc36bac..b59d25e0c7 100644
--- a/lib/SPIRV/SPIRVToOCL.h
+++ b/lib/SPIRV/SPIRVToOCL.h
@@ -120,6 +120,19 @@ class SPIRVToOCL : public ModulePass, public InstVisitor<SPIRVToOCL> {
   /// No change with arguments.
   void visitCallSPIRVBuiltin(CallInst *CI, Op OC);
 
+  /// Transform __spirv_ocl* instructions (OpenCL Extended Instruction Set)
+  /// to OpenCL builtins.
+  void visitCallSPIRVOCLExt(CallInst *CI, OCLExtOpKind Kind);
+
+  /// Transform __spirv_ocl_vstore* to corresponding vstore OpenCL instruction
+  void visitCallSPIRVVStore(CallInst *CI, OCLExtOpKind Kind);
+
+  /// Transform __spirv_ocl_vloadn to OpenCL vload[2|4|8|16]
+  void visitCallSPIRVVLoadn(CallInst *CI, OCLExtOpKind Kind);
+
+  /// Transform __spirv_ocl_printf to (i8 addrspace(2)*, ...) @printf
+  void visitCallSPIRVPrintf(CallInst *CI, OCLExtOpKind Kind);
+
   /// Get prefix work_/sub_ for OCL group builtin functions.
   /// Assuming the first argument of \param CI is a constant integer for
   /// workgroup/subgroup scope enums.
diff --git a/lib/SPIRV/SPIRVUtil.cpp b/lib/SPIRV/SPIRVUtil.cpp
index 24f08e1054..7caa21ff49 100644
--- a/lib/SPIRV/SPIRVUtil.cpp
+++ b/lib/SPIRV/SPIRVUtil.cpp
@@ -1524,6 +1524,35 @@ bool hasLoopMetadata(const Module *M) {
   return false;
 }
 
+bool isSPIRVOCLExtInst(const CallInst *CI, OCLExtOpKind *ExtOp) {
+  StringRef DemangledName;
+  if (!oclIsBuiltin(CI->getCalledFunction()->getName(), DemangledName))
+    return false;
+  StringRef S = DemangledName;
+  if (!S.startswith(kSPIRVName::Prefix))
+    return false;
+  S = S.drop_front(strlen(kSPIRVName::Prefix));
+  auto Loc = S.find(kSPIRVPostfix::Divider);
+  auto ExtSetName = S.substr(0, Loc);
+  SPIRVExtInstSetKind Set = SPIRVEIS_Count;
+  if (!SPIRVExtSetShortNameMap::rfind(ExtSetName.str(), &Set))
+    return false;
+
+  if (Set != SPIRVEIS_OpenCL)
+    return false;
+
+  auto ExtOpName = S.substr(Loc + 1);
+  auto PostFixPos = ExtOpName.find("_R");
+  ExtOpName = ExtOpName.substr(0, PostFixPos);
+
+  OCLExtOpKind EOC;
+  if (!OCLExtOpMap::rfind(ExtOpName.str(), &EOC))
+    return false;
+
+  *ExtOp = EOC;
+  return true;
+}
+
 // Returns true if type(s) and number of elements (if vector) is valid
 bool checkTypeForSPIRVExtendedInstLowering(IntrinsicInst *II, SPIRVModule *BM) {
   switch (II->getIntrinsicID()) {
diff --git a/lib/SPIRV/libSPIRV/SPIRVInstruction.h b/lib/SPIRV/libSPIRV/SPIRVInstruction.h
index 2d99cba78c..bd576d4666 100644
--- a/lib/SPIRV/libSPIRV/SPIRVInstruction.h
+++ b/lib/SPIRV/libSPIRV/SPIRVInstruction.h
@@ -1865,6 +1865,23 @@ class SPIRVExtInst : public SPIRVFunctionCallGeneric<OpExtInst, 5> {
       return Index == 3;
     }
   }
+  std::vector<SPIRVValue *> getArgValues() {
+    std::vector<SPIRVValue *> VArgs;
+    for (size_t I = 0; I < Args.size(); ++I) {
+      if (isOperandLiteral(I))
+        VArgs.push_back(Module->getLiteralAsConstant(Args[I]));
+      else
+        VArgs.push_back(getValue(Args[I]));
+    }
+    return VArgs;
+  }
+  std::vector<SPIRVType *> getArgTypes() {
+    std::vector<SPIRVType *> ArgTypes;
+    auto VArgs = getArgValues();
+    for (auto VArg : VArgs)
+      ArgTypes.push_back(VArg->getType());
+    return ArgTypes;
+  }
 
 protected:
   SPIRVExtInstSetKind ExtSetKind;
diff --git a/test/OpenCL.std/printf.spvasm b/test/OpenCL.std/printf.spvasm
new file mode 100644
index 0000000000..f4e703e9b4
--- /dev/null
+++ b/test/OpenCL.std/printf.spvasm
@@ -0,0 +1,77 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=SPV-IR -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPV-IR
+; RUN: llvm-spirv %t.rev.bc -o - -spirv-text | FileCheck %s --check-prefix=CHECK-SPV-BACK
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=CL2.0 -o - | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-CL20
+
+; CHECK-LABEL: spir_kernel void @test
+
+; CHECK-SPV-IR: call spir_func i32 @_Z18__spirv_ocl_printfPU3AS2c(i8 addrspace(2)* {{.*}})
+; CHECK-SPV-IR: call spir_func i32 @_Z18__spirv_ocl_printfPU3AS2ci(i8 addrspace(2)* {{.*}}, i32 1)
+
+; CHECK-SPV-IR: declare spir_func i32 @_Z18__spirv_ocl_printfPU3AS2c(i8 addrspace(2)*)
+; CHECK-SPV-IR: declare spir_func i32 @_Z18__spirv_ocl_printfPU3AS2ci(i8 addrspace(2)*, i32)
+
+; CHECK-CL20: call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* {{.*}})
+; CHECK-CL20: call spir_func i32 (i8 addrspace(2)*, ...) @printf(i8 addrspace(2)* {{.*}}, i32 1) 
+
+; CHECK-CL20: declare spir_func i32 @printf(i8 addrspace(2)*, ...)
+
+; CHECK-SPV-BACK: ExtInstImport [[Set:[0-9]+]] "OpenCL.std"
+; CHECK-SPV-BACK: TypeInt [[Int8:[0-9]+]] 8
+; CHECK-SPV-BACK: TypeInt [[Int32:[0-9]+]] 32
+; CHECK-SPV-BACK: Constant [[Int32]] [[One:[0-9]+]] 1{{[[:space:]]}}
+; CHECK-SPV-BACK: TypePointer [[Int8PtrTy:[0-9]+]] 0 [[Int8]]{{[[:space:]]}}
+; CHECK-SPV-BACK: InBoundsPtrAccessChain [[Int8PtrTy]] [[Int8Ptr:[0-9]+]]
+; CHECK-SPV-BACK: ExtInst [[Int32]] {{[0-9]+}} [[Set]] printf [[Int8Ptr]]
+; CHECK-SPV-BACK: InBoundsPtrAccessChain [[Int8PtrTy]] [[Int8Ptr2:[0-9]+]]
+; CHECK-SPV-BACK: ExtInst [[Int32]] {{[0-9]+}} [[Set]] printf [[Int8Ptr2]] [[One]]
+
+               OpCapability Addresses
+               OpCapability Kernel
+               OpCapability Int8
+          %1 = OpExtInstImport "OpenCL.std"
+               OpMemoryModel Physical32 OpenCL
+               OpEntryPoint Kernel %26 "test"
+         %35 = OpString "kernel_arg_type.test."
+               OpSource OpenCL_C 200000
+               OpDecorate %_str Constant
+               OpDecorate %_str_1 Constant
+               OpDecorate %_str Alignment 1
+               OpDecorate %_str_1 Alignment 1
+      %uchar = OpTypeInt 8 0
+       %uint = OpTypeInt 32 0
+   %uchar_84 = OpConstant %uchar 84
+  %uchar_101 = OpConstant %uchar 101
+  %uchar_115 = OpConstant %uchar 115
+  %uchar_116 = OpConstant %uchar 116
+   %uchar_10 = OpConstant %uchar 10
+    %uchar_0 = OpConstant %uchar 0
+     %uint_6 = OpConstant %uint 6
+   %uchar_58 = OpConstant %uchar 58
+   %uchar_32 = OpConstant %uchar 32
+   %uchar_37 = OpConstant %uchar 37
+  %uchar_100 = OpConstant %uchar 100
+    %uint_10 = OpConstant %uint 10
+     %uint_0 = OpConstant %uint 0
+     %uint_1 = OpConstant %uint 1
+%_arr_uchar_uint_6 = OpTypeArray %uchar %uint_6
+%_ptr_UniformConstant__arr_uchar_uint_6 = OpTypePointer UniformConstant %_arr_uchar_uint_6
+%_arr_uchar_uint_10 = OpTypeArray %uchar %uint_10
+%_ptr_UniformConstant__arr_uchar_uint_10 = OpTypePointer UniformConstant %_arr_uchar_uint_10
+       %void = OpTypeVoid
+         %25 = OpTypeFunction %void
+%_ptr_UniformConstant_uchar = OpTypePointer UniformConstant %uchar
+         %12 = OpConstantComposite %_arr_uchar_uint_6 %uchar_84 %uchar_101 %uchar_115 %uchar_116 %uchar_10 %uchar_0
+       %_str = OpVariable %_ptr_UniformConstant__arr_uchar_uint_6 UniformConstant %12
+         %21 = OpConstantComposite %_arr_uchar_uint_10 %uchar_84 %uchar_101 %uchar_115 %uchar_116 %uchar_58 %uchar_32 %uchar_37 %uchar_100 %uchar_10 %uchar_0
+     %_str_1 = OpVariable %_ptr_UniformConstant__arr_uchar_uint_10 UniformConstant %21
+         %26 = OpFunction %void None %25
+      %entry = OpLabel
+         %30 = OpInBoundsPtrAccessChain %_ptr_UniformConstant_uchar %_str %uint_0 %uint_0
+       %call = OpExtInst %uint %1 printf %30
+         %32 = OpInBoundsPtrAccessChain %_ptr_UniformConstant_uchar %_str_1 %uint_0 %uint_0
+      %call1 = OpExtInst %uint %1 printf %32 %uint_1
+               OpReturn
+               OpFunctionEnd
diff --git a/test/OpenCL.std/vstore_half.spvasm b/test/OpenCL.std/vstore_half.spvasm
new file mode 100644
index 0000000000..03e2604369
--- /dev/null
+++ b/test/OpenCL.std/vstore_half.spvasm
@@ -0,0 +1,327 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=SPV-IR -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPV-IR
+; RUN: llvm-spirv %t.rev.bc -o - -spirv-text | FileCheck %s --check-prefix=CHECK-SPV-BACK
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=CL2.0 -o - | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-CL20
+
+; CHECK-SPV-BACK: ExtInstImport [[Set:[0-9]+]] "OpenCL.std"
+; CHECK-SPV-BACK: TypeVoid [[VoidTy:[0-9]+]]
+
+; CHECK-LABEL: spir_kernel void @test
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z23__spirv_ocl_vstore_halffiPDh(float {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half
+
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z11vstore_halffjPDh(float {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTE
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 0)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 0
+
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtefjPDh(float {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTZ
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 1)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 1
+
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtzfjPDh(float {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTP
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 2)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 2
+
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtpfjPDh(float {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTN
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS1Dhi(float {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPU3AS3Dhi(float {{.*}}, i32 0, half addrspace(3)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstore_half_rfiPDhi(float {{.*}}, i32 0, half* {{.*}}, i32 3)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_half_r {{.*}} {{.*}} 3
+
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS1Dh(float {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPU3AS3Dh(float {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPDh(float {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z15vstore_half_rtnfjPDh(float {{.*}}, i32 0, half* {{.*}})
+
+               OpCapability Addresses
+               OpCapability Kernel
+               OpCapability Float16Buffer
+          %1 = OpExtInstImport "OpenCL.std"
+               OpMemoryModel Physical32 OpenCL
+               OpEntryPoint Kernel %7 "test"
+               OpEntryPoint Kernel %29 "testRTE"
+               OpEntryPoint Kernel %45 "testRTZ"
+               OpEntryPoint Kernel %61 "testRTP"
+               OpEntryPoint Kernel %77 "testRTN"
+         %93 = OpString "kernel_arg_type.test.half*,half*,"
+         %94 = OpString "kernel_arg_type.testRTE.half*,half*,"
+         %95 = OpString "kernel_arg_type.testRTZ.half*,half*,"
+         %96 = OpString "kernel_arg_type.testRTP.half*,half*,"
+         %97 = OpString "kernel_arg_type.testRTN.half*,half*,"
+               OpSource OpenCL_C 200000
+       %uint = OpTypeInt 32 0
+     %uint_0 = OpConstant %uint 0
+       %void = OpTypeVoid
+       %half = OpTypeFloat 16
+%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
+%_ptr_Workgroup_half = OpTypePointer Workgroup %half
+          %6 = OpTypeFunction %void %_ptr_CrossWorkgroup_half %_ptr_Workgroup_half
+      %float = OpTypeFloat 32
+%_ptr_Function_half = OpTypePointer Function %half
+    %float_0 = OpConstant %float 0
+         %24 = OpUndef %_ptr_Function_half
+          %7 = OpFunction %void None %6
+         %pg = OpFunctionParameter %_ptr_CrossWorkgroup_half
+         %pl = OpFunctionParameter %_ptr_Workgroup_half
+      %entry = OpLabel
+         %15 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pg
+         %16 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pg
+         %17 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pg
+         %18 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pg
+         %19 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pl
+         %20 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pl
+         %21 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pl
+         %22 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %pl
+         %25 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %24
+         %26 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %24
+         %27 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %24
+         %28 = OpExtInst %void %1 vstore_half %float_0 %uint_0 %24
+               OpReturn
+               OpFunctionEnd
+         %29 = OpFunction %void None %6
+       %pg_0 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+       %pl_0 = OpFunctionParameter %_ptr_Workgroup_half
+    %entry_0 = OpLabel
+         %33 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_0 RTE
+         %34 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_0 RTE
+         %35 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_0 RTE
+         %36 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_0 RTE
+         %37 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_0 RTE
+         %38 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_0 RTE
+         %39 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_0 RTE
+         %40 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_0 RTE
+         %41 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTE
+         %42 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTE
+         %43 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTE
+         %44 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTE
+               OpReturn
+               OpFunctionEnd
+         %45 = OpFunction %void None %6
+       %pg_1 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+       %pl_1 = OpFunctionParameter %_ptr_Workgroup_half
+    %entry_1 = OpLabel
+         %49 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_1 RTZ
+         %50 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_1 RTZ
+         %51 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_1 RTZ
+         %52 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_1 RTZ
+         %53 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_1 RTZ
+         %54 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_1 RTZ
+         %55 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_1 RTZ
+         %56 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_1 RTZ
+         %57 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTZ
+         %58 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTZ
+         %59 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTZ
+         %60 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTZ
+               OpReturn
+               OpFunctionEnd
+         %61 = OpFunction %void None %6
+       %pg_2 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+       %pl_2 = OpFunctionParameter %_ptr_Workgroup_half
+    %entry_2 = OpLabel
+         %65 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_2 RTP
+         %66 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_2 RTP
+         %67 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_2 RTP
+         %68 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_2 RTP
+         %69 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_2 RTP
+         %70 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_2 RTP
+         %71 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_2 RTP
+         %72 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_2 RTP
+         %73 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTP
+         %74 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTP
+         %75 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTP
+         %76 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTP
+               OpReturn
+               OpFunctionEnd
+         %77 = OpFunction %void None %6
+       %pg_3 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+       %pl_3 = OpFunctionParameter %_ptr_Workgroup_half
+    %entry_3 = OpLabel
+         %81 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_3 RTN
+         %82 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_3 RTN
+         %83 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_3 RTN
+         %84 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pg_3 RTN
+         %85 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_3 RTN
+         %86 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_3 RTN
+         %87 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_3 RTN
+         %88 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %pl_3 RTN
+         %89 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTN
+         %90 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTN
+         %91 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTN
+         %92 = OpExtInst %void %1 vstore_half_r %float_0 %uint_0 %24 RTN
+               OpReturn
+               OpFunctionEnd
diff --git a/test/OpenCL.std/vstore_halfn.spvasm b/test/OpenCL.std/vstore_halfn.spvasm
new file mode 100644
index 0000000000..3c224c8784
--- /dev/null
+++ b/test/OpenCL.std/vstore_halfn.spvasm
@@ -0,0 +1,191 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=SPV-IR -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPV-IR
+; RUN: llvm-spirv %t.rev.bc -o - -spirv-text | FileCheck %s --check-prefix=CHECK-SPV-BACK
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=CL2.0 -o - | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-CL20
+
+; CHECK-SPV-BACK: ExtInstImport [[Set:[0-9]+]] "OpenCL.std"
+; CHECK-SPV-BACK: TypeInt [[Int32:[0-9]+]] 32
+; CHECK-SPV-BACK: Constant [[Int32]] [[Zero:[0-9]+]] 0
+; CHECK-SPV-BACK: TypeVoid [[VoidTy:[0-9]+]]
+
+; CHECK-LABEL: spir_kernel void @test
+; CHECK-SPV-IR: call spir_func void @_Z24__spirv_ocl_vstore_halfnDv2_fiPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z24__spirv_ocl_vstore_halfnDv3_fiPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z24__spirv_ocl_vstore_halfnDv4_fiPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z24__spirv_ocl_vstore_halfnDv8_fiPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z24__spirv_ocl_vstore_halfnDv16_fiPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn
+
+; CHECK-CL20: call spir_func void @_Z12vstore_half2Dv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z12vstore_half3Dv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z12vstore_half4Dv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z12vstore_half8Dv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z13vstore_half16Dv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTE
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 0
+
+; CHECK-CL20: call spir_func void @_Z16vstore_half2_rteDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half3_rteDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half4_rteDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half8_rteDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstore_half16_rteDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTZ
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 1
+
+; CHECK-CL20: call spir_func void @_Z16vstore_half2_rtzDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half3_rtzDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half4_rtzDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half8_rtzDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstore_half16_rtzDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTP
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 2
+
+; CHECK-CL20: call spir_func void @_Z16vstore_half2_rtpDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half3_rtpDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half4_rtpDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half8_rtpDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstore_half16_rtpDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTN
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z26__spirv_ocl_vstore_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstore_halfn_r {{.*}} [[Zero]] {{.*}} 3
+
+; CHECK-CL20: call spir_func void @_Z16vstore_half2_rtnDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half3_rtnDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half4_rtnDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z16vstore_half8_rtnDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstore_half16_rtnDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+               OpCapability Addresses
+               OpCapability Kernel
+               OpCapability Vector16
+               OpCapability Float16Buffer
+          %1 = OpExtInstImport "OpenCL.std"
+               OpMemoryModel Physical32 OpenCL
+               OpEntryPoint Kernel %6 "test"
+               OpEntryPoint Kernel %27 "testRTE"
+               OpEntryPoint Kernel %35 "testRTZ"
+               OpEntryPoint Kernel %43 "testRTP"
+               OpEntryPoint Kernel %51 "testRTN"
+         %59 = OpString "kernel_arg_type.test.half*,"
+         %60 = OpString "kernel_arg_type.testRTE.half*,"
+         %61 = OpString "kernel_arg_type.testRTZ.half*,"
+         %62 = OpString "kernel_arg_type.testRTP.half*,"
+         %63 = OpString "kernel_arg_type.testRTN.half*,"
+               OpSource OpenCL_C 200000
+       %uint = OpTypeInt 32 0
+     %uint_0 = OpConstant %uint 0
+       %void = OpTypeVoid
+       %half = OpTypeFloat 16
+%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
+          %5 = OpTypeFunction %void %_ptr_CrossWorkgroup_half
+      %float = OpTypeFloat 32
+    %v2float = OpTypeVector %float 2
+    %v3float = OpTypeVector %float 3
+    %v4float = OpTypeVector %float 4
+    %v8float = OpTypeVector %float 8
+   %v16float = OpTypeVector %float 16
+         %11 = OpConstantNull %v2float
+         %16 = OpConstantNull %v3float
+         %19 = OpConstantNull %v4float
+         %22 = OpConstantNull %v8float
+         %25 = OpConstantNull %v16float
+          %6 = OpFunction %void None %5
+        %ptr = OpFunctionParameter %_ptr_CrossWorkgroup_half
+      %entry = OpLabel
+         %14 = OpExtInst %void %1 vstore_halfn %11 %uint_0 %ptr
+         %17 = OpExtInst %void %1 vstore_halfn %16 %uint_0 %ptr
+         %20 = OpExtInst %void %1 vstore_halfn %19 %uint_0 %ptr
+         %23 = OpExtInst %void %1 vstore_halfn %22 %uint_0 %ptr
+         %26 = OpExtInst %void %1 vstore_halfn %25 %uint_0 %ptr
+               OpReturn
+               OpFunctionEnd
+         %27 = OpFunction %void None %5
+      %ptr_0 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_0 = OpLabel
+         %30 = OpExtInst %void %1 vstore_halfn_r %11 %uint_0 %ptr_0 RTE
+         %31 = OpExtInst %void %1 vstore_halfn_r %16 %uint_0 %ptr_0 RTE
+         %32 = OpExtInst %void %1 vstore_halfn_r %19 %uint_0 %ptr_0 RTE
+         %33 = OpExtInst %void %1 vstore_halfn_r %22 %uint_0 %ptr_0 RTE
+         %34 = OpExtInst %void %1 vstore_halfn_r %25 %uint_0 %ptr_0 RTE
+               OpReturn
+               OpFunctionEnd
+         %35 = OpFunction %void None %5
+      %ptr_1 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_1 = OpLabel
+         %38 = OpExtInst %void %1 vstore_halfn_r %11 %uint_0 %ptr_1 RTZ
+         %39 = OpExtInst %void %1 vstore_halfn_r %16 %uint_0 %ptr_1 RTZ
+         %40 = OpExtInst %void %1 vstore_halfn_r %19 %uint_0 %ptr_1 RTZ
+         %41 = OpExtInst %void %1 vstore_halfn_r %22 %uint_0 %ptr_1 RTZ
+         %42 = OpExtInst %void %1 vstore_halfn_r %25 %uint_0 %ptr_1 RTZ
+               OpReturn
+               OpFunctionEnd
+         %43 = OpFunction %void None %5
+      %ptr_2 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_2 = OpLabel
+         %46 = OpExtInst %void %1 vstore_halfn_r %11 %uint_0 %ptr_2 RTP
+         %47 = OpExtInst %void %1 vstore_halfn_r %16 %uint_0 %ptr_2 RTP
+         %48 = OpExtInst %void %1 vstore_halfn_r %19 %uint_0 %ptr_2 RTP
+         %49 = OpExtInst %void %1 vstore_halfn_r %22 %uint_0 %ptr_2 RTP
+         %50 = OpExtInst %void %1 vstore_halfn_r %25 %uint_0 %ptr_2 RTP
+               OpReturn
+               OpFunctionEnd
+         %51 = OpFunction %void None %5
+      %ptr_3 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_3 = OpLabel
+         %54 = OpExtInst %void %1 vstore_halfn_r %11 %uint_0 %ptr_3 RTN
+         %55 = OpExtInst %void %1 vstore_halfn_r %16 %uint_0 %ptr_3 RTN
+         %56 = OpExtInst %void %1 vstore_halfn_r %19 %uint_0 %ptr_3 RTN
+         %57 = OpExtInst %void %1 vstore_halfn_r %22 %uint_0 %ptr_3 RTN
+         %58 = OpExtInst %void %1 vstore_halfn_r %25 %uint_0 %ptr_3 RTN
+               OpReturn
+               OpFunctionEnd
diff --git a/test/OpenCL.std/vstorea_halfn.spvasm b/test/OpenCL.std/vstorea_halfn.spvasm
new file mode 100644
index 0000000000..1c4712aaee
--- /dev/null
+++ b/test/OpenCL.std/vstorea_halfn.spvasm
@@ -0,0 +1,191 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=SPV-IR -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPV-IR
+; RUN: llvm-spirv %t.rev.bc -o - -spirv-text | FileCheck %s --check-prefix=CHECK-SPV-BACK
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=CL2.0 -o - | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-CL20
+
+; CHECK-SPV-BACK: ExtInstImport [[Set:[0-9]+]] "OpenCL.std"
+; CHECK-SPV-BACK: TypeInt [[Int32:[0-9]+]] 32
+; CHECK-SPV-BACK: Constant [[Int32]] [[Zero:[0-9]+]] 0
+; CHECK-SPV-BACK: TypeVoid [[VoidTy:[0-9]+]]
+
+; CHECK-LABEL: spir_kernel void @test
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstorea_halfnDv2_fiPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstorea_halfnDv3_fiPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstorea_halfnDv4_fiPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstorea_halfnDv8_fiPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z25__spirv_ocl_vstorea_halfnDv16_fiPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn
+
+; CHECK-CL20: call spir_func void @_Z13vstorea_half2Dv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z13vstorea_half3Dv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z13vstorea_half4Dv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z13vstorea_half8Dv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z14vstorea_half16Dv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTE
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 0)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 0
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 0
+
+; CHECK-CL20: call spir_func void @_Z17vstorea_half2_rteDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half3_rteDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half4_rteDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half8_rteDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z18vstorea_half16_rteDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTZ
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 1)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 1
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 1
+
+; CHECK-CL20: call spir_func void @_Z17vstorea_half2_rtzDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half3_rtzDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half4_rtzDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half8_rtzDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z18vstorea_half16_rtzDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTP
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 2)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 2
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 2
+
+; CHECK-CL20: call spir_func void @_Z17vstorea_half2_rtpDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half3_rtpDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half4_rtpDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half8_rtpDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z18vstorea_half16_rtpDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testRTN
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv2_fiPU3AS1Dhi(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv3_fiPU3AS1Dhi(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv4_fiPU3AS1Dhi(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv8_fiPU3AS1Dhi(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+; CHECK-SPV-IR: call spir_func void @_Z27__spirv_ocl_vstorea_halfn_rDv16_fiPU3AS1Dhi(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}}, i32 3)
+
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 3
+; CHECK-SPV-BACK: ExtInst [[VoidTy]] {{.*}} [[Set]] vstorea_halfn_r {{.*}} [[Zero]] {{.*}} 3
+
+; CHECK-CL20: call spir_func void @_Z17vstorea_half2_rtnDv2_fjPU3AS1Dh(<2 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half3_rtnDv3_fjPU3AS1Dh(<3 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half4_rtnDv4_fjPU3AS1Dh(<4 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z17vstorea_half8_rtnDv8_fjPU3AS1Dh(<8 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z18vstorea_half16_rtnDv16_fjPU3AS1Dh(<16 x float> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+
+               OpCapability Addresses
+               OpCapability Kernel
+               OpCapability Vector16
+               OpCapability Float16Buffer
+          %1 = OpExtInstImport "OpenCL.std"
+               OpMemoryModel Physical32 OpenCL
+               OpEntryPoint Kernel %6 "test"
+               OpEntryPoint Kernel %27 "testRTE"
+               OpEntryPoint Kernel %35 "testRTZ"
+               OpEntryPoint Kernel %43 "testRTP"
+               OpEntryPoint Kernel %51 "testRTN"
+         %59 = OpString "kernel_arg_type.test.half*,"
+         %60 = OpString "kernel_arg_type.testRTE.half*,"
+         %61 = OpString "kernel_arg_type.testRTZ.half*,"
+         %62 = OpString "kernel_arg_type.testRTP.half*,"
+         %63 = OpString "kernel_arg_type.testRTN.half*,"
+               OpSource OpenCL_C 200000
+       %uint = OpTypeInt 32 0
+     %uint_0 = OpConstant %uint 0
+       %void = OpTypeVoid
+       %half = OpTypeFloat 16
+%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
+          %5 = OpTypeFunction %void %_ptr_CrossWorkgroup_half
+      %float = OpTypeFloat 32
+    %v2float = OpTypeVector %float 2
+    %v3float = OpTypeVector %float 3
+    %v4float = OpTypeVector %float 4
+    %v8float = OpTypeVector %float 8
+   %v16float = OpTypeVector %float 16
+         %11 = OpConstantNull %v2float
+         %16 = OpConstantNull %v3float
+         %19 = OpConstantNull %v4float
+         %22 = OpConstantNull %v8float
+         %25 = OpConstantNull %v16float
+          %6 = OpFunction %void None %5
+        %ptr = OpFunctionParameter %_ptr_CrossWorkgroup_half
+      %entry = OpLabel
+         %14 = OpExtInst %void %1 vstorea_halfn %11 %uint_0 %ptr
+         %17 = OpExtInst %void %1 vstorea_halfn %16 %uint_0 %ptr
+         %20 = OpExtInst %void %1 vstorea_halfn %19 %uint_0 %ptr
+         %23 = OpExtInst %void %1 vstorea_halfn %22 %uint_0 %ptr
+         %26 = OpExtInst %void %1 vstorea_halfn %25 %uint_0 %ptr
+               OpReturn
+               OpFunctionEnd
+         %27 = OpFunction %void None %5
+      %ptr_0 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_0 = OpLabel
+         %30 = OpExtInst %void %1 vstorea_halfn_r %11 %uint_0 %ptr_0 RTE
+         %31 = OpExtInst %void %1 vstorea_halfn_r %16 %uint_0 %ptr_0 RTE
+         %32 = OpExtInst %void %1 vstorea_halfn_r %19 %uint_0 %ptr_0 RTE
+         %33 = OpExtInst %void %1 vstorea_halfn_r %22 %uint_0 %ptr_0 RTE
+         %34 = OpExtInst %void %1 vstorea_halfn_r %25 %uint_0 %ptr_0 RTE
+               OpReturn
+               OpFunctionEnd
+         %35 = OpFunction %void None %5
+      %ptr_1 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_1 = OpLabel
+         %38 = OpExtInst %void %1 vstorea_halfn_r %11 %uint_0 %ptr_1 RTZ
+         %39 = OpExtInst %void %1 vstorea_halfn_r %16 %uint_0 %ptr_1 RTZ
+         %40 = OpExtInst %void %1 vstorea_halfn_r %19 %uint_0 %ptr_1 RTZ
+         %41 = OpExtInst %void %1 vstorea_halfn_r %22 %uint_0 %ptr_1 RTZ
+         %42 = OpExtInst %void %1 vstorea_halfn_r %25 %uint_0 %ptr_1 RTZ
+               OpReturn
+               OpFunctionEnd
+         %43 = OpFunction %void None %5
+      %ptr_2 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_2 = OpLabel
+         %46 = OpExtInst %void %1 vstorea_halfn_r %11 %uint_0 %ptr_2 RTP
+         %47 = OpExtInst %void %1 vstorea_halfn_r %16 %uint_0 %ptr_2 RTP
+         %48 = OpExtInst %void %1 vstorea_halfn_r %19 %uint_0 %ptr_2 RTP
+         %49 = OpExtInst %void %1 vstorea_halfn_r %22 %uint_0 %ptr_2 RTP
+         %50 = OpExtInst %void %1 vstorea_halfn_r %25 %uint_0 %ptr_2 RTP
+               OpReturn
+               OpFunctionEnd
+         %51 = OpFunction %void None %5
+      %ptr_3 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+    %entry_3 = OpLabel
+         %54 = OpExtInst %void %1 vstorea_halfn_r %11 %uint_0 %ptr_3 RTN
+         %55 = OpExtInst %void %1 vstorea_halfn_r %16 %uint_0 %ptr_3 RTN
+         %56 = OpExtInst %void %1 vstorea_halfn_r %19 %uint_0 %ptr_3 RTN
+         %57 = OpExtInst %void %1 vstorea_halfn_r %22 %uint_0 %ptr_3 RTN
+         %58 = OpExtInst %void %1 vstorea_halfn_r %25 %uint_0 %ptr_3 RTN
+               OpReturn
+               OpFunctionEnd
diff --git a/test/OpenCL.std/vstoren.spvasm b/test/OpenCL.std/vstoren.spvasm
new file mode 100644
index 0000000000..f83ee56ac2
--- /dev/null
+++ b/test/OpenCL.std/vstoren.spvasm
@@ -0,0 +1,639 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=SPV-IR -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPV-IR
+; RUN: llvm-spirv %t.rev.bc -o - -spirv-text | FileCheck %s --check-prefix=CHECK-SPV-BACK
+; RUN: llvm-spirv %t.spv -r --spirv-target-env=CL2.0 -o - | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-CL20
+
+; CHECK-SPV-BACK: ExtInstImport [[Set:[0-9]+]] "OpenCL.std"
+; CHECK-SPV-BACK: TypeVoid [[VoidTy:[0-9]+]]
+
+; CHECK-LABEL: spir_kernel void @testChar
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_ciPU3AS1c(<2 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_ciPU3AS1c(<3 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_ciPU3AS1c(<4 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_ciPU3AS1c(<8 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_ciPU3AS1c(<16 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_ciPU3AS3c(<2 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_ciPU3AS3c(<3 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_ciPU3AS3c(<4 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_ciPU3AS3c(<8 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_ciPU3AS3c(<16 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_ciPc(<2 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_ciPc(<3 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_ciPc(<4 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_ciPc(<8 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_ciPc(<16 x i8> {{.*}}, i32 0, i8* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_cjPU3AS1c(<2 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_cjPU3AS1c(<3 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_cjPU3AS1c(<4 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_cjPU3AS1c(<8 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_cjPU3AS1c(<16 x i8> {{.*}}, i32 0, i8 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_cjPU3AS3c(<2 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_cjPU3AS3c(<3 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_cjPU3AS3c(<4 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_cjPU3AS3c(<8 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_cjPU3AS3c(<16 x i8> {{.*}}, i32 0, i8 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_cjPc(<2 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_cjPc(<3 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_cjPc(<4 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_cjPc(<8 x i8> {{.*}}, i32 0, i8* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_cjPc(<16 x i8> {{.*}}, i32 0, i8* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testShort
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_siPU3AS1s(<2 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_siPU3AS1s(<3 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_siPU3AS1s(<4 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_siPU3AS1s(<8 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_siPU3AS1s(<16 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_siPU3AS3s(<2 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_siPU3AS3s(<3 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_siPU3AS3s(<4 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_siPU3AS3s(<8 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_siPU3AS3s(<16 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_siPs(<2 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_siPs(<3 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_siPs(<4 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_siPs(<8 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_siPs(<16 x i16> {{.*}}, i32 0, i16* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_sjPU3AS1s(<2 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_sjPU3AS1s(<3 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_sjPU3AS1s(<4 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_sjPU3AS1s(<8 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_sjPU3AS1s(<16 x i16> {{.*}}, i32 0, i16 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_sjPU3AS3s(<2 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_sjPU3AS3s(<3 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_sjPU3AS3s(<4 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_sjPU3AS3s(<8 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_sjPU3AS3s(<16 x i16> {{.*}}, i32 0, i16 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_sjPs(<2 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_sjPs(<3 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_sjPs(<4 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_sjPs(<8 x i16> {{.*}}, i32 0, i16* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_sjPs(<16 x i16> {{.*}}, i32 0, i16* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testInt
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_iiPU3AS1i(<2 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_iiPU3AS1i(<3 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_iiPU3AS1i(<4 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_iiPU3AS1i(<8 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_iiPU3AS1i(<16 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_iiPU3AS3i(<2 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_iiPU3AS3i(<3 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_iiPU3AS3i(<4 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_iiPU3AS3i(<8 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_iiPU3AS3i(<16 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_iiPi(<2 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_iiPi(<3 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_iiPi(<4 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_iiPi(<8 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_iiPi(<16 x i32> {{.*}}, i32 0, i32* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ijPU3AS1i(<2 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ijPU3AS1i(<3 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ijPU3AS1i(<4 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ijPU3AS1i(<8 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ijPU3AS1i(<16 x i32> {{.*}}, i32 0, i32 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ijPU3AS3i(<2 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ijPU3AS3i(<3 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ijPU3AS3i(<4 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ijPU3AS3i(<8 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ijPU3AS3i(<16 x i32> {{.*}}, i32 0, i32 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ijPi(<2 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ijPi(<3 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ijPi(<4 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ijPi(<8 x i32> {{.*}}, i32 0, i32* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ijPi(<16 x i32> {{.*}}, i32 0, i32* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testLong
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_liPU3AS1l(<2 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_liPU3AS1l(<3 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_liPU3AS1l(<4 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_liPU3AS1l(<8 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_liPU3AS1l(<16 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_liPU3AS3l(<2 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_liPU3AS3l(<3 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_liPU3AS3l(<4 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_liPU3AS3l(<8 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_liPU3AS3l(<16 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_liPl(<2 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_liPl(<3 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_liPl(<4 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_liPl(<8 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_liPl(<16 x i64> {{.*}}, i32 0, i64* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ljPU3AS1l(<2 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ljPU3AS1l(<3 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ljPU3AS1l(<4 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ljPU3AS1l(<8 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ljPU3AS1l(<16 x i64> {{.*}}, i32 0, i64 addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ljPU3AS3l(<2 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ljPU3AS3l(<3 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ljPU3AS3l(<4 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ljPU3AS3l(<8 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ljPU3AS3l(<16 x i64> {{.*}}, i32 0, i64 addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_ljPl(<2 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_ljPl(<3 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_ljPl(<4 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_ljPl(<8 x i64> {{.*}}, i32 0, i64* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_ljPl(<16 x i64> {{.*}}, i32 0, i64* {{.*}})
+ 
+; CHECK-LABEL: spir_kernel void @testHalf
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_DhiPU3AS1Dh(<2 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_DhiPU3AS1Dh(<3 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_DhiPU3AS1Dh(<4 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_DhiPU3AS1Dh(<8 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_DhiPU3AS1Dh(<16 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_DhiPU3AS3Dh(<2 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_DhiPU3AS3Dh(<3 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_DhiPU3AS3Dh(<4 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_DhiPU3AS3Dh(<8 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_DhiPU3AS3Dh(<16 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_DhiPDh(<2 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_DhiPDh(<3 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_DhiPDh(<4 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_DhiPDh(<8 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_DhiPDh(<16 x half> {{.*}}, i32 0, half* {{.*}})
+ 
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+ 
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_DhjPU3AS1Dh(<2 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_DhjPU3AS1Dh(<3 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_DhjPU3AS1Dh(<4 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_DhjPU3AS1Dh(<8 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_DhjPU3AS1Dh(<16 x half> {{.*}}, i32 0, half addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_DhjPU3AS3Dh(<2 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_DhjPU3AS3Dh(<3 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_DhjPU3AS3Dh(<4 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_DhjPU3AS3Dh(<8 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_DhjPU3AS3Dh(<16 x half> {{.*}}, i32 0, half addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_DhjPDh(<2 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_DhjPDh(<3 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_DhjPDh(<4 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_DhjPDh(<8 x half> {{.*}}, i32 0, half* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_DhjPDh(<16 x half> {{.*}}, i32 0, half* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testFloat
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_fiPU3AS1f(<2 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_fiPU3AS1f(<3 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_fiPU3AS1f(<4 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_fiPU3AS1f(<8 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_fiPU3AS1f(<16 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_fiPU3AS3f(<2 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_fiPU3AS3f(<3 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_fiPU3AS3f(<4 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_fiPU3AS3f(<8 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_fiPU3AS3f(<16 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_fiPf(<2 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_fiPf(<3 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_fiPf(<4 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_fiPf(<8 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_fiPf(<16 x float> {{.*}}, i32 0, float* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_fjPU3AS1f(<2 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_fjPU3AS1f(<3 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_fjPU3AS1f(<4 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_fjPU3AS1f(<8 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_fjPU3AS1f(<16 x float> {{.*}}, i32 0, float addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_fjPU3AS3f(<2 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_fjPU3AS3f(<3 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_fjPU3AS3f(<4 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_fjPU3AS3f(<8 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_fjPU3AS3f(<16 x float> {{.*}}, i32 0, float addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_fjPf(<2 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_fjPf(<3 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_fjPf(<4 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_fjPf(<8 x float> {{.*}}, i32 0, float* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_fjPf(<16 x float> {{.*}}, i32 0, float* {{.*}})
+
+; CHECK-LABEL: spir_kernel void @testDouble
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_diPU3AS1d(<2 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_diPU3AS1d(<3 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_diPU3AS1d(<4 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_diPU3AS1d(<8 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_diPU3AS1d(<16 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_diPU3AS3d(<2 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_diPU3AS3d(<3 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_diPU3AS3d(<4 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_diPU3AS3d(<8 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_diPU3AS3d(<16 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv2_diPd(<2 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv3_diPd(<3 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv4_diPd(<4 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv8_diPd(<8 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-SPV-IR: call spir_func void @_Z19__spirv_ocl_vstorenDv16_diPd(<16 x double> {{.*}}, i32 0, double* {{.*}})
+
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+; CHECK-SPV-BACK ExtInst [[VoidTy]] {{.*}} [[Set]] vstoren
+
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_djPU3AS1d(<2 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_djPU3AS1d(<3 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_djPU3AS1d(<4 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_djPU3AS1d(<8 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_djPU3AS1d(<16 x double> {{.*}}, i32 0, double addrspace(1)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_djPU3AS3d(<2 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_djPU3AS3d(<3 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_djPU3AS3d(<4 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_djPU3AS3d(<8 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_djPU3AS3d(<16 x double> {{.*}}, i32 0, double addrspace(3)* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore2Dv2_djPd(<2 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore3Dv3_djPd(<3 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore4Dv4_djPd(<4 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-CL20: call spir_func void @_Z7vstore8Dv8_djPd(<8 x double> {{.*}}, i32 0, double* {{.*}})
+; CHECK-CL20: call spir_func void @_Z8vstore16Dv16_djPd(<16 x double> {{.*}}, i32 0, double* {{.*}})
+
+               OpCapability Addresses
+               OpCapability Kernel
+               OpCapability Vector16
+               OpCapability Float16Buffer
+               OpCapability Float64
+               OpCapability Int64
+               OpCapability Int16
+               OpCapability Int8
+          %1 = OpExtInstImport "OpenCL.std"
+               OpMemoryModel Physical32 OpenCL
+               OpEntryPoint Kernel %7 "testChar"
+               OpEntryPoint Kernel %44 "testShort"
+               OpEntryPoint Kernel %78 "testInt"
+               OpEntryPoint Kernel %113 "testLong"
+               OpEntryPoint Kernel %148 "testHalf"
+               OpEntryPoint Kernel %183 "testFloat"
+               OpEntryPoint Kernel %218 "testDouble"
+        %249 = OpString "kernel_arg_type.testChar.char*,char*,"
+        %250 = OpString "kernel_arg_type.testShort.short*,short*,"
+        %251 = OpString "kernel_arg_type.testInt.int*,int*,"
+        %252 = OpString "kernel_arg_type.testLong.long*,long*,"
+        %253 = OpString "kernel_arg_type.testHalf.half*,half*,"
+        %254 = OpString "kernel_arg_type.testFloat.float*,float*,"
+        %255 = OpString "kernel_arg_type.testDouble.double*,double*,"
+               OpSource OpenCL_C 200000
+      %uchar = OpTypeInt 8 0
+       %uint = OpTypeInt 32 0
+     %ushort = OpTypeInt 16 0
+      %ulong = OpTypeInt 64 0
+     %uint_0 = OpConstant %uint 0
+       %void = OpTypeVoid
+%_ptr_CrossWorkgroup_uchar = OpTypePointer CrossWorkgroup %uchar
+%_ptr_Workgroup_uchar = OpTypePointer Workgroup %uchar
+          %6 = OpTypeFunction %void %_ptr_CrossWorkgroup_uchar %_ptr_Workgroup_uchar
+    %v2uchar = OpTypeVector %uchar 2
+    %v3uchar = OpTypeVector %uchar 3
+    %v4uchar = OpTypeVector %uchar 4
+    %v8uchar = OpTypeVector %uchar 8
+   %v16uchar = OpTypeVector %uchar 16
+%_ptr_Function_uchar = OpTypePointer Function %uchar
+%_ptr_CrossWorkgroup_ushort = OpTypePointer CrossWorkgroup %ushort
+%_ptr_Workgroup_ushort = OpTypePointer Workgroup %ushort
+         %43 = OpTypeFunction %void %_ptr_CrossWorkgroup_ushort %_ptr_Workgroup_ushort
+   %v2ushort = OpTypeVector %ushort 2
+   %v3ushort = OpTypeVector %ushort 3
+   %v4ushort = OpTypeVector %ushort 4
+   %v8ushort = OpTypeVector %ushort 8
+  %v16ushort = OpTypeVector %ushort 16
+%_ptr_Function_ushort = OpTypePointer Function %ushort
+%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
+%_ptr_Workgroup_uint = OpTypePointer Workgroup %uint
+         %77 = OpTypeFunction %void %_ptr_CrossWorkgroup_uint %_ptr_Workgroup_uint
+     %v2uint = OpTypeVector %uint 2
+     %v3uint = OpTypeVector %uint 3
+     %v4uint = OpTypeVector %uint 4
+     %v8uint = OpTypeVector %uint 8
+    %v16uint = OpTypeVector %uint 16
+%_ptr_Function_uint = OpTypePointer Function %uint
+%_ptr_CrossWorkgroup_ulong = OpTypePointer CrossWorkgroup %ulong
+%_ptr_Workgroup_ulong = OpTypePointer Workgroup %ulong
+        %112 = OpTypeFunction %void %_ptr_CrossWorkgroup_ulong %_ptr_Workgroup_ulong
+    %v2ulong = OpTypeVector %ulong 2
+    %v3ulong = OpTypeVector %ulong 3
+    %v4ulong = OpTypeVector %ulong 4
+    %v8ulong = OpTypeVector %ulong 8
+   %v16ulong = OpTypeVector %ulong 16
+%_ptr_Function_ulong = OpTypePointer Function %ulong
+       %half = OpTypeFloat 16
+%_ptr_CrossWorkgroup_half = OpTypePointer CrossWorkgroup %half
+%_ptr_Workgroup_half = OpTypePointer Workgroup %half
+        %147 = OpTypeFunction %void %_ptr_CrossWorkgroup_half %_ptr_Workgroup_half
+     %v2half = OpTypeVector %half 2
+     %v3half = OpTypeVector %half 3
+     %v4half = OpTypeVector %half 4
+     %v8half = OpTypeVector %half 8
+    %v16half = OpTypeVector %half 16
+%_ptr_Function_half = OpTypePointer Function %half
+      %float = OpTypeFloat 32
+%_ptr_CrossWorkgroup_float = OpTypePointer CrossWorkgroup %float
+%_ptr_Workgroup_float = OpTypePointer Workgroup %float
+        %182 = OpTypeFunction %void %_ptr_CrossWorkgroup_float %_ptr_Workgroup_float
+    %v2float = OpTypeVector %float 2
+    %v3float = OpTypeVector %float 3
+    %v4float = OpTypeVector %float 4
+    %v8float = OpTypeVector %float 8
+   %v16float = OpTypeVector %float 16
+%_ptr_Function_float = OpTypePointer Function %float
+     %double = OpTypeFloat 64
+%_ptr_CrossWorkgroup_double = OpTypePointer CrossWorkgroup %double
+%_ptr_Workgroup_double = OpTypePointer Workgroup %double
+        %217 = OpTypeFunction %void %_ptr_CrossWorkgroup_double %_ptr_Workgroup_double
+   %v2double = OpTypeVector %double 2
+   %v3double = OpTypeVector %double 3
+   %v4double = OpTypeVector %double 4
+   %v8double = OpTypeVector %double 8
+  %v16double = OpTypeVector %double 16
+%_ptr_Function_double = OpTypePointer Function %double
+         %12 = OpConstantNull %v2uchar
+         %17 = OpConstantNull %v3uchar
+         %20 = OpConstantNull %v4uchar
+         %23 = OpConstantNull %v8uchar
+         %26 = OpConstantNull %v16uchar
+         %34 = OpUndef %_ptr_Function_uchar
+         %49 = OpConstantNull %v2ushort
+         %52 = OpConstantNull %v3ushort
+         %55 = OpConstantNull %v4ushort
+         %58 = OpConstantNull %v8ushort
+         %61 = OpConstantNull %v16ushort
+         %69 = OpUndef %_ptr_Function_ushort
+         %83 = OpConstantNull %v2uint
+         %86 = OpConstantNull %v3uint
+         %89 = OpConstantNull %v4uint
+         %92 = OpConstantNull %v8uint
+         %95 = OpConstantNull %v16uint
+        %103 = OpUndef %_ptr_Function_uint
+        %118 = OpConstantNull %v2ulong
+        %121 = OpConstantNull %v3ulong
+        %124 = OpConstantNull %v4ulong
+        %127 = OpConstantNull %v8ulong
+        %130 = OpConstantNull %v16ulong
+        %138 = OpUndef %_ptr_Function_ulong
+        %153 = OpConstantNull %v2half
+        %156 = OpConstantNull %v3half
+        %159 = OpConstantNull %v4half
+        %162 = OpConstantNull %v8half
+        %165 = OpConstantNull %v16half
+        %173 = OpUndef %_ptr_Function_half
+        %188 = OpConstantNull %v2float
+        %191 = OpConstantNull %v3float
+        %194 = OpConstantNull %v4float
+        %197 = OpConstantNull %v8float
+        %200 = OpConstantNull %v16float
+        %208 = OpUndef %_ptr_Function_float
+        %223 = OpConstantNull %v2double
+        %226 = OpConstantNull %v3double
+        %229 = OpConstantNull %v4double
+        %232 = OpConstantNull %v8double
+        %235 = OpConstantNull %v16double
+        %243 = OpUndef %_ptr_Function_double
+          %7 = OpFunction %void None %6
+         %pg = OpFunctionParameter %_ptr_CrossWorkgroup_uchar
+         %pl = OpFunctionParameter %_ptr_Workgroup_uchar
+      %entry = OpLabel
+         %15 = OpExtInst %void %1 vstoren %12 %uint_0 %pg
+         %18 = OpExtInst %void %1 vstoren %17 %uint_0 %pg
+         %21 = OpExtInst %void %1 vstoren %20 %uint_0 %pg
+         %24 = OpExtInst %void %1 vstoren %23 %uint_0 %pg
+         %27 = OpExtInst %void %1 vstoren %26 %uint_0 %pg
+         %28 = OpExtInst %void %1 vstoren %12 %uint_0 %pl
+         %29 = OpExtInst %void %1 vstoren %17 %uint_0 %pl
+         %30 = OpExtInst %void %1 vstoren %20 %uint_0 %pl
+         %31 = OpExtInst %void %1 vstoren %23 %uint_0 %pl
+         %32 = OpExtInst %void %1 vstoren %26 %uint_0 %pl
+         %35 = OpExtInst %void %1 vstoren %12 %uint_0 %34
+         %36 = OpExtInst %void %1 vstoren %17 %uint_0 %34
+         %37 = OpExtInst %void %1 vstoren %20 %uint_0 %34
+         %38 = OpExtInst %void %1 vstoren %23 %uint_0 %34
+         %39 = OpExtInst %void %1 vstoren %26 %uint_0 %34
+               OpReturn
+               OpFunctionEnd
+         %44 = OpFunction %void None %43
+       %pg_0 = OpFunctionParameter %_ptr_CrossWorkgroup_ushort
+       %pl_0 = OpFunctionParameter %_ptr_Workgroup_ushort
+    %entry_0 = OpLabel
+         %50 = OpExtInst %void %1 vstoren %49 %uint_0 %pg_0
+         %53 = OpExtInst %void %1 vstoren %52 %uint_0 %pg_0
+         %56 = OpExtInst %void %1 vstoren %55 %uint_0 %pg_0
+         %59 = OpExtInst %void %1 vstoren %58 %uint_0 %pg_0
+         %62 = OpExtInst %void %1 vstoren %61 %uint_0 %pg_0
+         %63 = OpExtInst %void %1 vstoren %49 %uint_0 %pl_0
+         %64 = OpExtInst %void %1 vstoren %52 %uint_0 %pl_0
+         %65 = OpExtInst %void %1 vstoren %55 %uint_0 %pl_0
+         %66 = OpExtInst %void %1 vstoren %58 %uint_0 %pl_0
+         %67 = OpExtInst %void %1 vstoren %61 %uint_0 %pl_0
+         %70 = OpExtInst %void %1 vstoren %49 %uint_0 %69
+         %71 = OpExtInst %void %1 vstoren %52 %uint_0 %69
+         %72 = OpExtInst %void %1 vstoren %55 %uint_0 %69
+         %73 = OpExtInst %void %1 vstoren %58 %uint_0 %69
+         %74 = OpExtInst %void %1 vstoren %61 %uint_0 %69
+               OpReturn
+               OpFunctionEnd
+         %78 = OpFunction %void None %77
+       %pg_1 = OpFunctionParameter %_ptr_CrossWorkgroup_uint
+       %pl_1 = OpFunctionParameter %_ptr_Workgroup_uint
+    %entry_1 = OpLabel
+         %84 = OpExtInst %void %1 vstoren %83 %uint_0 %pg_1
+         %87 = OpExtInst %void %1 vstoren %86 %uint_0 %pg_1
+         %90 = OpExtInst %void %1 vstoren %89 %uint_0 %pg_1
+         %93 = OpExtInst %void %1 vstoren %92 %uint_0 %pg_1
+         %96 = OpExtInst %void %1 vstoren %95 %uint_0 %pg_1
+         %97 = OpExtInst %void %1 vstoren %83 %uint_0 %pl_1
+         %98 = OpExtInst %void %1 vstoren %86 %uint_0 %pl_1
+         %99 = OpExtInst %void %1 vstoren %89 %uint_0 %pl_1
+        %100 = OpExtInst %void %1 vstoren %92 %uint_0 %pl_1
+        %101 = OpExtInst %void %1 vstoren %95 %uint_0 %pl_1
+        %104 = OpExtInst %void %1 vstoren %83 %uint_0 %103
+        %105 = OpExtInst %void %1 vstoren %86 %uint_0 %103
+        %106 = OpExtInst %void %1 vstoren %89 %uint_0 %103
+        %107 = OpExtInst %void %1 vstoren %92 %uint_0 %103
+        %108 = OpExtInst %void %1 vstoren %95 %uint_0 %103
+               OpReturn
+               OpFunctionEnd
+        %113 = OpFunction %void None %112
+       %pg_2 = OpFunctionParameter %_ptr_CrossWorkgroup_ulong
+       %pl_2 = OpFunctionParameter %_ptr_Workgroup_ulong
+    %entry_2 = OpLabel
+        %119 = OpExtInst %void %1 vstoren %118 %uint_0 %pg_2
+        %122 = OpExtInst %void %1 vstoren %121 %uint_0 %pg_2
+        %125 = OpExtInst %void %1 vstoren %124 %uint_0 %pg_2
+        %128 = OpExtInst %void %1 vstoren %127 %uint_0 %pg_2
+        %131 = OpExtInst %void %1 vstoren %130 %uint_0 %pg_2
+        %132 = OpExtInst %void %1 vstoren %118 %uint_0 %pl_2
+        %133 = OpExtInst %void %1 vstoren %121 %uint_0 %pl_2
+        %134 = OpExtInst %void %1 vstoren %124 %uint_0 %pl_2
+        %135 = OpExtInst %void %1 vstoren %127 %uint_0 %pl_2
+        %136 = OpExtInst %void %1 vstoren %130 %uint_0 %pl_2
+        %139 = OpExtInst %void %1 vstoren %118 %uint_0 %138
+        %140 = OpExtInst %void %1 vstoren %121 %uint_0 %138
+        %141 = OpExtInst %void %1 vstoren %124 %uint_0 %138
+        %142 = OpExtInst %void %1 vstoren %127 %uint_0 %138
+        %143 = OpExtInst %void %1 vstoren %130 %uint_0 %138
+               OpReturn
+               OpFunctionEnd
+        %148 = OpFunction %void None %147
+       %pg_3 = OpFunctionParameter %_ptr_CrossWorkgroup_half
+       %pl_3 = OpFunctionParameter %_ptr_Workgroup_half
+    %entry_3 = OpLabel
+        %154 = OpExtInst %void %1 vstoren %153 %uint_0 %pg_3
+        %157 = OpExtInst %void %1 vstoren %156 %uint_0 %pg_3
+        %160 = OpExtInst %void %1 vstoren %159 %uint_0 %pg_3
+        %163 = OpExtInst %void %1 vstoren %162 %uint_0 %pg_3
+        %166 = OpExtInst %void %1 vstoren %165 %uint_0 %pg_3
+        %167 = OpExtInst %void %1 vstoren %153 %uint_0 %pl_3
+        %168 = OpExtInst %void %1 vstoren %156 %uint_0 %pl_3
+        %169 = OpExtInst %void %1 vstoren %159 %uint_0 %pl_3
+        %170 = OpExtInst %void %1 vstoren %162 %uint_0 %pl_3
+        %171 = OpExtInst %void %1 vstoren %165 %uint_0 %pl_3
+        %174 = OpExtInst %void %1 vstoren %153 %uint_0 %173
+        %175 = OpExtInst %void %1 vstoren %156 %uint_0 %173
+        %176 = OpExtInst %void %1 vstoren %159 %uint_0 %173
+        %177 = OpExtInst %void %1 vstoren %162 %uint_0 %173
+        %178 = OpExtInst %void %1 vstoren %165 %uint_0 %173
+               OpReturn
+               OpFunctionEnd
+        %183 = OpFunction %void None %182
+       %pg_4 = OpFunctionParameter %_ptr_CrossWorkgroup_float
+       %pl_4 = OpFunctionParameter %_ptr_Workgroup_float
+    %entry_4 = OpLabel
+        %189 = OpExtInst %void %1 vstoren %188 %uint_0 %pg_4
+        %192 = OpExtInst %void %1 vstoren %191 %uint_0 %pg_4
+        %195 = OpExtInst %void %1 vstoren %194 %uint_0 %pg_4
+        %198 = OpExtInst %void %1 vstoren %197 %uint_0 %pg_4
+        %201 = OpExtInst %void %1 vstoren %200 %uint_0 %pg_4
+        %202 = OpExtInst %void %1 vstoren %188 %uint_0 %pl_4
+        %203 = OpExtInst %void %1 vstoren %191 %uint_0 %pl_4
+        %204 = OpExtInst %void %1 vstoren %194 %uint_0 %pl_4
+        %205 = OpExtInst %void %1 vstoren %197 %uint_0 %pl_4
+        %206 = OpExtInst %void %1 vstoren %200 %uint_0 %pl_4
+        %209 = OpExtInst %void %1 vstoren %188 %uint_0 %208
+        %210 = OpExtInst %void %1 vstoren %191 %uint_0 %208
+        %211 = OpExtInst %void %1 vstoren %194 %uint_0 %208
+        %212 = OpExtInst %void %1 vstoren %197 %uint_0 %208
+        %213 = OpExtInst %void %1 vstoren %200 %uint_0 %208
+               OpReturn
+               OpFunctionEnd
+        %218 = OpFunction %void None %217
+       %pg_5 = OpFunctionParameter %_ptr_CrossWorkgroup_double
+       %pl_5 = OpFunctionParameter %_ptr_Workgroup_double
+    %entry_5 = OpLabel
+        %224 = OpExtInst %void %1 vstoren %223 %uint_0 %pg_5
+        %227 = OpExtInst %void %1 vstoren %226 %uint_0 %pg_5
+        %230 = OpExtInst %void %1 vstoren %229 %uint_0 %pg_5
+        %233 = OpExtInst %void %1 vstoren %232 %uint_0 %pg_5
+        %236 = OpExtInst %void %1 vstoren %235 %uint_0 %pg_5
+        %237 = OpExtInst %void %1 vstoren %223 %uint_0 %pl_5
+        %238 = OpExtInst %void %1 vstoren %226 %uint_0 %pl_5
+        %239 = OpExtInst %void %1 vstoren %229 %uint_0 %pl_5
+        %240 = OpExtInst %void %1 vstoren %232 %uint_0 %pl_5
+        %241 = OpExtInst %void %1 vstoren %235 %uint_0 %pl_5
+        %244 = OpExtInst %void %1 vstoren %223 %uint_0 %243
+        %245 = OpExtInst %void %1 vstoren %226 %uint_0 %243
+        %246 = OpExtInst %void %1 vstoren %229 %uint_0 %243
+        %247 = OpExtInst %void %1 vstoren %232 %uint_0 %243
+        %248 = OpExtInst %void %1 vstoren %235 %uint_0 %243
+               OpReturn
+               OpFunctionEnd