From 30dacfcd6350395abd7c6735c3cf3c62de4a204c Mon Sep 17 00:00:00 2001 From: Andrzej Ratajewski Date: Mon, 10 Jun 2019 11:06:23 +0200 Subject: [PATCH] Implementation of SPIRV -> LLVM IR translation for SPV_INTEL__device_side_avc_motion_estimation extension. Corresponding OpenCL extension is 'cl_intel_device_side_avc_motion_estimation' https://www.khronos.org/registry/OpenCL/extensions/intel/cl_intel_device_side_avc_motion_estimation.txt --- lib/SPIRV/Mangler/ManglingUtils.cpp | 31 ++- lib/SPIRV/Mangler/ParameterType.h | 14 +- lib/SPIRV/OCLUtil.cpp | 81 ++++++- lib/SPIRV/SPIRVInternal.h | 5 + lib/SPIRV/SPIRVReader.cpp | 65 +++++- lib/SPIRV/SPIRVUtil.cpp | 25 +++ lib/SPIRV/libSPIRV/SPIRVOpCode.h | 16 ++ .../subgroup_avc_intel_generic.spt | 200 +++++++++++++++++ .../subgroup_avc_intel_not_builtin.spt | 35 +++ test/transcoding/subgroup_avc_intel_types.spt | 111 +++++++++ .../subgroup_avc_intel_vme_image.spt | 211 ++++++++++++++++++ 11 files changed, 785 insertions(+), 9 deletions(-) create mode 100644 test/transcoding/subgroup_avc_intel_generic.spt create mode 100644 test/transcoding/subgroup_avc_intel_not_builtin.spt create mode 100644 test/transcoding/subgroup_avc_intel_types.spt create mode 100644 test/transcoding/subgroup_avc_intel_vme_image.spt diff --git a/lib/SPIRV/Mangler/ManglingUtils.cpp b/lib/SPIRV/Mangler/ManglingUtils.cpp index 39a452b50a..59780cf782 100644 --- a/lib/SPIRV/Mangler/ManglingUtils.cpp +++ b/lib/SPIRV/Mangler/ManglingUtils.cpp @@ -77,7 +77,20 @@ static const char *PrimitiveNames[PRIMITIVE_NUM] = { "kernel_enqueue_flags_t", "clk_profiling_info", "memory_order", - "memory_scope"}; + "memory_scope", + "intel_sub_group_avc_mce_payload_t", + "intel_sub_group_avc_ime_payload_t", + "intel_sub_group_avc_ref_payload_t", + "intel_sub_group_avc_sic_payload_t", + "intel_sub_group_avc_mce_result_t", + "intel_sub_group_avc_ime_result_t", + "intel_sub_group_avc_ref_result_t", + "intel_sub_group_avc_sic_result_t", + "intel_sub_group_avc_ime_result_single_reference_streamout_t", + "intel_sub_group_avc_ime_result_dual_reference_streamout_t", + "intel_sub_group_avc_ime_result_single_reference_streamin_t", + "intel_sub_group_avc_ime_result_dual_reference_streamin_t" +}; const char *MangledTypes[PRIMITIVE_NUM] = { "b", // BOOL @@ -144,9 +157,21 @@ const char *MangledTypes[PRIMITIVE_NUM] = { "i", // PRIMITIVE_MEMORY_ORDER "i", // PRIMITIVE_MEMORY_SCOPE #else - "12memory_order", // PRIMITIVE_MEMORY_ORDER - "12memory_scope" // PRIMITIVE_MEMORY_SCOPE + "12memory_order", // PRIMITIVE_MEMORY_ORDER + "12memory_scope", // PRIMITIVE_MEMORY_SCOPE #endif + "37ocl_intel_sub_group_avc_mce_payload_t", // PRIMITIVE_SUB_GROUP_AVC_MCE_PAYLOAD_T + "37ocl_intel_sub_group_avc_ime_payload_t", // PRIMITIVE_SUB_GROUP_AVC_IME_PAYLOAD_T + "37ocl_intel_sub_group_avc_ref_payload_t", // PRIMITIVE_SUB_GROUP_AVC_REF_PAYLOAD_T + "37ocl_intel_sub_group_avc_sic_payload_t", // PRIMITIVE_SUB_GROUP_AVC_SIC_PAYLOAD_T + "36ocl_intel_sub_group_avc_mce_result_t", // PRIMITIVE_SUB_GROUP_AVC_MCE_RESULT_T + "36ocl_intel_sub_group_avc_ime_result_t", // PRIMITIVE_SUB_GROUP_AVC_IME_RESULT_T + "36ocl_intel_sub_group_avc_ref_result_t", // PRIMITIVE_SUB_GROUP_AVC_REF_RESULT_T + "36ocl_intel_sub_group_avc_sic_result_t", // PRIMITIVE_SUB_GROUP_AVC_REF_RESULT_T + "63ocl_intel_sub_group_avc_ime_result_single_reference_streamout_t", // PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMOUT_T + "61ocl_intel_sub_group_avc_ime_result_dual_reference_streamout_t", // PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMOUT_T + "55ocl_intel_sub_group_avc_ime_single_reference_streamin_t", // PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMIN_T + "53ocl_intel_sub_group_avc_ime_dual_reference_streamin_t" // PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMIN_T }; const char *ReadableAttribute[ATTR_NUM] = { diff --git a/lib/SPIRV/Mangler/ParameterType.h b/lib/SPIRV/Mangler/ParameterType.h index 289bc1efb0..a9ec51d48a 100644 --- a/lib/SPIRV/Mangler/ParameterType.h +++ b/lib/SPIRV/Mangler/ParameterType.h @@ -97,7 +97,19 @@ enum TypePrimitiveEnum { PRIMITIVE_CLK_PROFILING_INFO, PRIMITIVE_MEMORY_ORDER, PRIMITIVE_MEMORY_SCOPE, - PRIMITIVE_LAST = PRIMITIVE_MEMORY_SCOPE, + PRIMITIVE_SUB_GROUP_AVC_MCE_PAYLOAD_T, + PRIMITIVE_SUB_GROUP_AVC_IME_PAYLOAD_T, + PRIMITIVE_SUB_GROUP_AVC_REF_PAYLOAD_T, + PRIMITIVE_SUB_GROUP_AVC_SIC_PAYLOAD_T, + PRIMITIVE_SUB_GROUP_AVC_MCE_RESULT_T, + PRIMITIVE_SUB_GROUP_AVC_IME_RESULT_T, + PRIMITIVE_SUB_GROUP_AVC_REF_RESULT_T, + PRIMITIVE_SUB_GROUP_AVC_SIC_RESULT_T, + PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMOUT_T, + PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMOUT_T, + PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMIN_T, + PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMIN_T, + PRIMITIVE_LAST = PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMIN_T, PRIMITIVE_NONE, // Keep this at the end. PRIMITIVE_NUM = PRIMITIVE_NONE diff --git a/lib/SPIRV/OCLUtil.cpp b/lib/SPIRV/OCLUtil.cpp index 151a2f9fa7..1572f949ce 100644 --- a/lib/SPIRV/OCLUtil.cpp +++ b/lib/SPIRV/OCLUtil.cpp @@ -70,6 +70,10 @@ namespace OCLUtil { #define SPIRV_EVENT_T_ADDR_SPACE SPIRV_OCL_SPECIAL_TYPES_DEFAULT_ADDR_SPACE #endif +#ifndef SPIRV_AVC_INTEL_T_ADDR_SPACE +#define SPIRV_AVC_INTEL_T_ADDR_SPACE SPIRV_OCL_SPECIAL_TYPES_DEFAULT_ADDR_SPACE +#endif + #ifndef SPIRV_CLK_EVENT_T_ADDR_SPACE #define SPIRV_CLK_EVENT_T_ADDR_SPACE SPIRV_OCL_SPECIAL_TYPES_DEFAULT_ADDR_SPACE #endif @@ -334,6 +338,8 @@ SPIRAddressSpace getOCLOpaqueTypeAddrSpace(Op OpCode) { case OpTypeSampler: return SPIRV_SAMPLER_T_ADDR_SPACE; default: + if (isSubgroupAvcINTELTypeOpCode(OpCode)) + return SPIRV_AVC_INTEL_T_ADDR_SPACE; assert(false && "No address space is determined for some OCL type"); return SPIRV_OCL_SPECIAL_TYPES_DEFAULT_ADDR_SPACE; } @@ -428,6 +434,13 @@ class OCLBuiltinFuncMangleInfo : public SPIRV::BuiltinFuncMangleInfo { UnmangledName = UniqName; size_t Pos = std::string::npos; + auto EraseSubstring = [](std::string &Str, std::string ToErase) { + size_t Pos = Str.find(ToErase); + if (Pos != std::string::npos) { + Str.erase(Pos, ToErase.length()); + } + }; + if (UnmangledName.find("async_work_group") == 0) { addUnsignedArg(-1); setArgAttr(1, SPIR::ATTR_CONST); @@ -586,11 +599,75 @@ class OCLBuiltinFuncMangleInfo : public SPIRV::BuiltinFuncMangleInfo { (Pos = UnmangledName.find("umin")) != std::string::npos) { addUnsignedArg(-1); UnmangledName.erase(Pos, 1); - } else if (UnmangledName.find("broadcast") != std::string::npos) + } else if (UnmangledName.find("broadcast") != std::string::npos) { addUnsignedArg(-1); - else if (UnmangledName.find(kOCLBuiltinName::SampledReadImage) == 0) { + } else if (UnmangledName.find(kOCLBuiltinName::SampledReadImage) == 0) { UnmangledName.erase(0, strlen(kOCLBuiltinName::Sampled)); addSamplerArg(1); + } else if (UnmangledName.find(kOCLSubgroupsAVCIntel::Prefix) != + std::string::npos) { + if (UnmangledName.find("evaluate_with_single_reference") != + std::string::npos) + addSamplerArg(2); + else if (UnmangledName.find("evaluate_with_multi_reference") != + std::string::npos) { + addUnsignedArg(1); + std::string PostFix = "_interlaced"; + if (UnmangledName.find(PostFix) != std::string::npos) { + addUnsignedArg(2); + addSamplerArg(3); + size_t Pos = UnmangledName.find(PostFix); + if (Pos != std::string::npos) + UnmangledName.erase(Pos, PostFix.length()); + } else + addSamplerArg(2); + } else if (UnmangledName.find("evaluate_with_dual_reference") != + std::string::npos) + addSamplerArg(3); + else if (UnmangledName.find("fme_initialize") != std::string::npos) + addUnsignedArgs(0, 6); + else if (UnmangledName.find("bme_initialize") != std::string::npos) + addUnsignedArgs(0, 7); + else if (UnmangledName.find("set_inter_base_multi_reference_penalty") != + std::string::npos || + UnmangledName.find("set_inter_shape_penalty") != + std::string::npos) + addUnsignedArg(0); + else if (UnmangledName.find("set_motion_vector_cost_function") != + std::string::npos) + addUnsignedArgs(0, 2); + else if (UnmangledName.find(kOCLSubgroupsAVCIntel::MCEPrefix) != + std::string::npos) { + if (UnmangledName.find("get_default") != std::string::npos) + addUnsignedArgs(0, 1); + } else if (UnmangledName.find(kOCLSubgroupsAVCIntel::IMEPrefix) != + std::string::npos) { + if (UnmangledName.find("initialize") != std::string::npos) + addUnsignedArgs(0, 2); + else if (UnmangledName.find("set_single_reference") != + std::string::npos) + addUnsignedArg(1); + else if (UnmangledName.find("adjust_ref_offset") != std::string::npos) + addUnsignedArgs(1, 3); + else if (UnmangledName.find("set_max_motion_vector_count") != + std::string::npos || + UnmangledName.find("get_border_reached") != std::string::npos) + addUnsignedArg(0); + } else if (UnmangledName.find(kOCLSubgroupsAVCIntel::SICPrefix) != + std::string::npos) { + if (UnmangledName.find("initialize") != std::string::npos) + addUnsignedArg(0); + else if (UnmangledName.find("configure_ipe") != std::string::npos) { + if (UnmangledName.find("_luma") != std::string::npos) { + addUnsignedArgs(0, 6); + EraseSubstring(UnmangledName, "_luma"); + } + if (UnmangledName.find("_chroma") != std::string::npos) { + addUnsignedArgs(7, 9); + EraseSubstring(UnmangledName, "_chroma"); + } + } + } } } // Auxiliarry information, it is expected what it is relevant at the moment diff --git a/lib/SPIRV/SPIRVInternal.h b/lib/SPIRV/SPIRVInternal.h index 394ad4d842..0146fb5751 100644 --- a/lib/SPIRV/SPIRVInternal.h +++ b/lib/SPIRV/SPIRVInternal.h @@ -412,6 +412,11 @@ class BuiltinFuncMangleInfo { virtual ~BuiltinFuncMangleInfo() {} const std::string &getUnmangledName() const { return UnmangledName; } void addUnsignedArg(int Ndx) { UnsignedArgs.insert(Ndx); } + void addUnsignedArgs(int StartNdx, int StopNdx) { + assert(StartNdx < StopNdx && "wrong parameters"); + for (size_t I = StartNdx; I <= StopNdx; ++I) + addUnsignedArg(I); + } void addVoidPtrArg(int Ndx) { VoidPtrArgs.insert(Ndx); } void addSamplerArg(int Ndx) { SamplerArgs.insert(Ndx); } void addAtomicArg(int Ndx) { AtomicArgs.insert(Ndx); } diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp index 82900badbe..eeceb30578 100644 --- a/lib/SPIRV/SPIRVReader.cpp +++ b/lib/SPIRV/SPIRVReader.cpp @@ -444,12 +444,18 @@ Type *SPIRVToLLVM::transType(SPIRVType *T, bool IsClassMember) { T, getOrCreateOpaquePtrType(M, transOCLPipeStorageTypeName(PST), getOCLOpaqueTypeAddrSpace(T->getOpCode()))); } + // OpenCL Compiler does not use this instruction + case OpTypeVmeImageINTEL: + return nullptr; default: { auto OC = T->getOpCode(); - if (isOpaqueGenericTypeOpCode(OC)) + if (isOpaqueGenericTypeOpCode(OC) || isSubgroupAvcINTELTypeOpCode(OC)) { + auto Name = isSubgroupAvcINTELTypeOpCode(OC) + ? OCLSubgroupINTELTypeOpCodeMap::rmap(OC) + : OCLOpaqueTypeOpCodeMap::rmap(OC); return mapType( - T, getOrCreateOpaquePtrType(M, OCLOpaqueTypeOpCodeMap::rmap(OC), - getOCLOpaqueTypeAddrSpace(OC))); + T, getOrCreateOpaquePtrType(M, Name, getOCLOpaqueTypeAddrSpace(OC))); + } llvm_unreachable("Not implemented"); } } @@ -1468,6 +1474,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, BV->getName(), BB)); } + case OpVmeImageINTEL: case OpLine: case OpSelectionMerge: // OpenCL Compiler does not use this instruction case OpLoopMerge: // Should be translated at OpBranch or OpBranchConditional @@ -1736,6 +1743,7 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F, if (isSPIRVCmpInstTransToLLVMInst(static_cast(BV))) { return mapValue(BV, transCmpInst(BV, BB, F)); } else if ((OCLSPIRVBuiltinMap::rfind(OC, nullptr) || + isSubgroupAvcINTELInstructionOpCode(OC) || isIntelSubgroupOpCode(OC)) && !isAtomicOpCode(OC) && !isGroupOpCode(OC) && !isPipeOpCode(OC)) { return mapValue( @@ -1860,6 +1868,54 @@ void SPIRVToLLVM::transOCLBuiltinFromInstPreproc( else if (OC == OpImageRead && Args.size() > 2) { // Drop "Image operands" argument Args.erase(Args.begin() + 2); + } else if (isSubgroupAvcINTELEvaluateOpcode(OC)) { + // There are three types of AVC Intel Evaluate opcodes: + // 1. With multi reference images - does not use OpVmeImageINTEL opcode for + // reference images + // 2. With dual reference images - uses two OpVmeImageINTEL opcodes for + // reference image + // 3. With single reference image - uses one OpVmeImageINTEL opcode for + // reference image + int NumImages = + std::count_if(Args.begin(), Args.end(), [](SPIRVValue *Arg) { + return static_cast(Arg)->getOpCode() == + OpVmeImageINTEL; + }); + if (NumImages) { + SPIRVInstruction *SrcImage = static_cast(Args[0]); + assert(SrcImage && + "Src image operand not found in avc evaluate instruction"); + if (NumImages == 1) { + // Multi reference opcode - remove src image OpVmeImageINTEL opcode + // and replace it with corresponding OpImage and OpSampler arguments + bool IsInterlaced = (Args.size() == 4) ? true : false; + size_t SamplerPos = IsInterlaced ? 3 : 2; + Args.erase(Args.begin(), Args.begin() + 1); + Args.insert(Args.begin(), SrcImage->getOperands()[0]); + Args.insert(Args.begin() + SamplerPos, SrcImage->getOperands()[1]); + } else { + SPIRVInstruction *FwdRefImage = + static_cast(Args[1]); + SPIRVInstruction *BwdRefImage = + static_cast(Args[2]); + assert(FwdRefImage && "invalid avc evaluate instruction"); + // Single reference opcode - remove src and ref image OpVmeImageINTEL + // opcodes and replace them with src and ref OpImage opcodes and + // OpSampler + Args.erase(Args.begin(), Args.begin() + NumImages); + // insert source OpImage and OpSampler + auto SrcOps = SrcImage->getOperands(); + Args.insert(Args.begin(), SrcOps.begin(), SrcOps.end()); + // insert reference OpImage + Args.insert(Args.begin() + 1, FwdRefImage->getOperands()[0]); + if (NumImages == 3) { + // Dual reference opcode - insert second reference OpImage argument + assert(BwdRefImage && "invalid avc evaluate instruction"); + Args.insert(Args.begin() + 2, BwdRefImage->getOperands()[0]); + } + } + } else + llvm_unreachable("invalid avc instruction"); } } @@ -2134,6 +2190,9 @@ std::string SPIRVToLLVM::getOCLBuiltinName(SPIRVInstruction *BI) { } return Name.str(); } + if (isSubgroupAvcINTELInstructionOpCode(OC)) + return OCLSPIRVSubgroupAVCIntelBuiltinMap::rmap(OC); + auto Name = OCLSPIRVBuiltinMap::rmap(OC); SPIRVType *T = nullptr; diff --git a/lib/SPIRV/SPIRVUtil.cpp b/lib/SPIRV/SPIRVUtil.cpp index 8992c05152..9f730e155f 100644 --- a/lib/SPIRV/SPIRVUtil.cpp +++ b/lib/SPIRV/SPIRVUtil.cpp @@ -972,6 +972,31 @@ SPIR::TypePrimitiveEnum getOCLTypePrimitiveEnum(StringRef TyName) { .Case("opencl.clk_event_t", SPIR::PRIMITIVE_CLK_EVENT_T) .Case("opencl.sampler_t", SPIR::PRIMITIVE_SAMPLER_T) .Case("struct.ndrange_t", SPIR::PRIMITIVE_NDRANGE_T) + .Case("opencl.intel_sub_group_avc_mce_payload_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_MCE_PAYLOAD_T) + .Case("opencl.intel_sub_group_avc_ime_payload_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_PAYLOAD_T) + .Case("opencl.intel_sub_group_avc_ref_payload_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_REF_PAYLOAD_T) + .Case("opencl.intel_sub_group_avc_sic_payload_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_SIC_PAYLOAD_T) + .Case("opencl.intel_sub_group_avc_mce_result_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_MCE_RESULT_T) + .Case("opencl.intel_sub_group_avc_ime_result_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_RESULT_T) + .Case("opencl.intel_sub_group_avc_ref_result_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_REF_RESULT_T) + .Case("opencl.intel_sub_group_avc_sic_result_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_SIC_RESULT_T) + .Case( + "opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMOUT_T) + .Case("opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMOUT_T) + .Case("opencl.intel_sub_group_avc_ime_single_reference_streamin_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMIN_T) + .Case("opencl.intel_sub_group_avc_ime_dual_reference_streamin_t", + SPIR::PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMIN_T) .Default(SPIR::PRIMITIVE_NONE); } /// Translates LLVM type to descriptor for mangler. diff --git a/lib/SPIRV/libSPIRV/SPIRVOpCode.h b/lib/SPIRV/libSPIRV/SPIRVOpCode.h index e280b40f3f..1c5b5984c3 100644 --- a/lib/SPIRV/libSPIRV/SPIRVOpCode.h +++ b/lib/SPIRV/libSPIRV/SPIRVOpCode.h @@ -145,6 +145,22 @@ inline bool isSubgroupAvcINTELTypeOpCode(Op OpCode) { return OpTypeAvcImePayloadINTEL <= OC && OC <= OpTypeAvcSicResultINTEL; } +inline bool isSubgroupAvcINTELInstructionOpCode(Op OpCode) { + unsigned OC = OpCode; + return OpSubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL <= OC && + OC <= OpSubgroupAvcSicGetInterRawSadsINTEL; +} + +inline bool isSubgroupAvcINTELEvaluateOpcode(Op OpCode) { + unsigned OC = OpCode; + return (OpSubgroupAvcImeEvaluateWithSingleReferenceINTEL <= OC && + OC <= OpSubgroupAvcImeEvaluateWithDualReferenceStreaminoutINTEL) || + (OpSubgroupAvcRefEvaluateWithSingleReferenceINTEL <= OC && + OC <= OpSubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL) || + (OpSubgroupAvcSicEvaluateIpeINTEL <= OC && + OC <= OpSubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL); +} + inline bool isTypeOpCode(Op OpCode) { unsigned OC = OpCode; return (OpTypeVoid <= OC && OC <= OpTypePipe) || OC == OpTypePipeStorage || diff --git a/test/transcoding/subgroup_avc_intel_generic.spt b/test/transcoding/subgroup_avc_intel_generic.spt new file mode 100644 index 0000000000..0540ce3012 --- /dev/null +++ b/test/transcoding/subgroup_avc_intel_generic.spt @@ -0,0 +1,200 @@ +119734787 65536 393230 76 0 +2 Capability Addresses +2 Capability Linkage +2 Capability Kernel +2 Capability Int64 +2 Capability Groups +2 Capability Int16 +2 Capability Int8 +2 Capability SubgroupAvcMotionEstimationINTEL +2 Capability SubgroupAvcMotionEstimationIntraINTEL +2 Capability SubgroupAvcMotionEstimationChromaINTEL +5 ExtInstImport 1 "OpenCL.std" +3 MemoryModel 2 2 +3 Source 3 102000 +3 Name 4 "foo" +4 Name 5 "entry" +5 Name 8 "ime_payload" +5 Name 11 "sstreamin" +5 Name 14 "dstreamin" +5 Name 17 "sstreamout" +5 Name 20 "dstreamout" +5 Name 23 "ime_result" +5 Name 26 "ref_payload" +5 Name 29 "sic_payload" +5 Name 32 "sic_result" +5 Name 35 "ref_result" +4 Name 45 "call" +4 Name 48 "call1" +4 Name 50 "call2" +4 Name 52 "call3" +4 Name 53 "call4" +4 Name 57 "call5" +4 Name 58 "call6" +4 Name 59 "call6i" +4 Name 60 "call7" +4 Name 61 "call8" +4 Name 62 "call9" +4 Name 63 "call10" +4 Name 64 "call11" +4 Name 65 "call12" +4 Name 67 "call13" +4 Name 68 "call14" +4 Name 69 "call15" +4 Name 70 "call16" +4 Name 71 "call17" +4 Name 73 "call18" +4 Name 74 "call19" +4 Decorate 75 Alignment 8 +2 DecorationGroup 75 +5 Decorate 4 LinkageAttributes "foo" Export +12 GroupDecorate 75 8 11 14 17 20 23 26 29 32 35 +4 TypeInt 44 8 0 +4 TypeInt 47 64 0 +4 TypeInt 49 32 0 +4 TypeInt 54 16 0 +4 Constant 44 46 0 +5 Constant 47 66 0 0 +4 Constant 54 72 0 +2 TypeVoid 2 +3 TypeFunction 3 2 +2 TypeAvcImePayloadINTEL 6 +4 TypePointer 7 7 6 +2 TypeAvcImeSingleReferenceStreaminINTEL 9 +4 TypePointer 10 7 9 +2 TypeAvcImeDualReferenceStreaminINTEL 12 +4 TypePointer 13 7 12 +2 TypeAvcImeResultSingleReferenceStreamoutINTEL 15 +4 TypePointer 16 7 15 +2 TypeAvcImeResultDualReferenceStreamoutINTEL 18 +4 TypePointer 19 7 18 +2 TypeAvcImeResultINTEL 21 +4 TypePointer 22 7 21 +2 TypeAvcRefPayloadINTEL 24 +4 TypePointer 25 7 24 +2 TypeAvcSicPayloadINTEL 27 +4 TypePointer 28 7 27 +2 TypeAvcSicResultINTEL 30 +4 TypePointer 31 7 30 +2 TypeAvcRefResultINTEL 33 +4 TypePointer 34 7 33 +4 TypeVector 51 49 2 +4 TypeVector 55 54 2 +3 ConstantNull 55 56 + + +5 Function 2 4 2 3 + +2 Label 5 +4 Variable 7 8 7 +4 Variable 10 11 7 +4 Variable 13 14 7 +4 Variable 16 17 7 +4 Variable 19 20 7 +4 Variable 22 23 7 +4 Variable 25 26 7 +4 Variable 28 29 7 +4 Variable 31 32 7 +4 Variable 34 35 7 +6 Load 6 36 8 2 8 +6 Load 15 37 17 2 8 +6 Load 18 38 20 2 8 +6 Load 21 39 23 2 8 +6 Load 24 40 26 2 8 +6 Load 27 41 29 2 8 +6 Load 30 42 32 2 8 +6 Load 33 43 35 2 8 +5 SubgroupAvcMceGetDefaultInterBaseMultiReferencePenaltyINTEL 44 45 46 46 +5 SubgroupAvcMceGetDefaultInterShapePenaltyINTEL 47 48 46 46 +5 SubgroupAvcMceGetDefaultIntraLumaShapePenaltyINTEL 49 50 46 46 +5 SubgroupAvcMceGetDefaultInterMotionVectorCostTableINTEL 51 52 46 46 +6 SubgroupAvcImeInitializeINTEL 6 53 56 46 46 +6 SubgroupAvcImeSetSingleReferenceINTEL 6 57 56 46 36 +5 SubgroupAvcImeRefWindowSizeINTEL 55 58 46 46 +5 SubgroupAvcImeRefWindowSizeINTEL 55 59 46 46 +7 SubgroupAvcImeAdjustRefOffsetINTEL 55 60 56 56 56 56 +5 SubgroupAvcImeSetMaxMotionVectorCountINTEL 6 61 46 36 +4 SubgroupAvcImeGetSingleReferenceStreaminINTEL 9 62 37 +4 SubgroupAvcImeGetDualReferenceStreaminINTEL 12 63 38 +5 SubgroupAvcImeGetBorderReachedINTEL 44 64 46 39 +10 SubgroupAvcFmeInitializeINTEL 24 65 56 66 46 46 46 46 46 +11 SubgroupAvcBmeInitializeINTEL 24 67 56 66 46 46 46 46 46 46 +4 SubgroupAvcRefSetBidirectionalMixDisableINTEL 24 68 40 +4 SubgroupAvcSicInitializeINTEL 27 69 56 +11 SubgroupAvcSicConfigureIpeLumaINTEL 27 70 46 46 46 46 46 46 46 41 +14 SubgroupAvcSicConfigureIpeLumaChromaINTEL 27 71 46 46 46 46 46 46 72 72 72 46 41 +4 SubgroupAvcSicGetBestIpeLumaDistortionINTEL 54 73 42 +4 SubgroupAvcRefConvertToMceResultINTEL 54 74 43 +1 Return + +1 FunctionEnd + +; RUN: llvm-spirv %s -to-binary -o %t.spv +; RUN: llvm-spirv -r %t.spv -o %t.bc +; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM + +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_single_reference_streamin_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_result_t = type opaque + +; CHECK-LLVM: define spir_func void @foo() + +; CHECK-LLVM: %ime_payload = alloca %opencl.intel_sub_group_avc_ime_payload_t +; CHECK-LLVM: %sstreamin = alloca %opencl.intel_sub_group_avc_ime_single_reference_streamin_t +; CHECK-LLVM: %dstreamin = alloca %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t +; CHECK-LLVM: %sstreamout = alloca %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t +; CHECK-LLVM: %dstreamout = alloca %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t +; CHECK-LLVM: %ime_result = alloca %opencl.intel_sub_group_avc_ime_result_t +; CHECK-LLVM: %ref_payload = alloca %opencl.intel_sub_group_avc_ref_payload_t +; CHECK-LLVM: %sic_payload = alloca %opencl.intel_sub_group_avc_sic_payload_t +; CHECK-LLVM: %sic_result = alloca %opencl.intel_sub_group_avc_sic_result_t +; CHECK-LLVM: %ref_result = alloca %opencl.intel_sub_group_avc_ref_result_t + +; CHECK-LLVM: %[[IME_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_payload_t +; CHECK-LLVM: %[[IME_SINGLE_STREAMOUT:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t +; CHECK-LLVM: %[[IME_DUAL_STREAMOUT:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t +; CHECK-LLVM: %[[IME_RESULT:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_result_t +; CHECK-LLVM: %[[REF_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_ref_payload_t +; CHECK-LLVM: %[[SIC_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_sic_payload_t +; CHECK-LLVM: %[[SIC_RESULT:[0-9]+]] = load %opencl.intel_sub_group_avc_sic_result_t +; CHECK-LLVM: %[[REF_RESULT:[0-9]+]] = load %opencl.intel_sub_group_avc_ref_result_t + +; CHECK-LLVM: %[[BMR_PENALTY:[a-z0-9]+]] = call spir_func i8 @_Z70intel_sub_group_avc_mce_get_default_inter_base_multi_reference_penaltyhh(i8 0, i8 0) +; CHECK-LLVM: %[[SHAPE_PENALTY:[a-z0-9]+]] = call spir_func i64 @_Z55intel_sub_group_avc_mce_get_default_inter_shape_penaltyhh(i8 0, i8 0) +; CHECK-LLVM: %[[LUMA_SHAPE_PENALTY:[a-z0-9]+]] = call spir_func i32 @_Z60intel_sub_group_avc_mce_get_default_intra_luma_shape_penaltyhh(i8 0, i8 0) +; CHECK-LLVM: %[[MOTION_VECTOR:[a-z0-9]+]] = call spir_func <2 x i32> @_Z66intel_sub_group_avc_mce_get_default_inter_motion_vector_cost_tablehh(i8 0, i8 0) + +; CHECK-LLVM: %[[IME_INIT:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_payload_t* @_Z34intel_sub_group_avc_ime_initializeDv2_thh(<2 x i16> zeroinitializer, i8 0, i8 0) + +; CHECK-LLVM: %[[SINGLE_REF:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_payload_t* @_Z44intel_sub_group_avc_ime_set_single_referenceDv2_sh37ocl_intel_sub_group_avc_ime_payload_t(<2 x i16> zeroinitializer, i8 0, %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) + +; CHECK-LLVM: %[[ADJ_REF_OFFSET:[a-z0-9]+]] = call spir_func <2 x i16> @_Z41intel_sub_group_avc_ime_adjust_ref_offsetDv2_sDv2_tS0_S0_(<2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer) + +; CHECK-LLVM: %[[MOTION_VECTOR_COUNT:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_payload_t* @_Z51intel_sub_group_avc_ime_set_max_motion_vector_counth37ocl_intel_sub_group_avc_ime_payload_t(i8 0, %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) + +; CHECK-LLVM: %[[SINGLE_STREAMIN:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_single_reference_streamin_t* @_Z53intel_sub_group_avc_ime_get_single_reference_streamin63ocl_intel_sub_group_avc_ime_result_single_reference_streamout_t(%opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t* %[[IME_SINGLE_STREAMOUT]]) +; CHECK-LLVM: %[[DUAL_STREAMIN:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t* @_Z51intel_sub_group_avc_ime_get_dual_reference_streamin61ocl_intel_sub_group_avc_ime_result_dual_reference_streamout_t(%opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t* %[[IME_DUAL_STREAMOUT]]) + +; CHECK-LLVM: %[[GET_BORDER:[a-z0-9]+]] = call spir_func i8 @_Z42intel_sub_group_avc_ime_get_border_reachedh36ocl_intel_sub_group_avc_ime_result_t(i8 0, %opencl.intel_sub_group_avc_ime_result_t* %[[IME_RESULT]]) + +; CHECK-LLVM: %[[FME_INIT:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_payload_t* @_Z34intel_sub_group_avc_fme_initializeDv2_tmhhhhh(<2 x i16> zeroinitializer, i64 0, i8 0, i8 0, i8 0, i8 0, i8 0) +; CHECK-LLVM: %[[BME_INIT:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_payload_t* @_Z34intel_sub_group_avc_bme_initializeDv2_tmhhhhhh(<2 x i16> zeroinitializer, i64 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0) + +; CHECK-LLVM: %[[MIX_DISABLE:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_payload_t* @_Z53intel_sub_group_avc_ref_set_bidirectional_mix_disable37ocl_intel_sub_group_avc_ref_payload_t(%opencl.intel_sub_group_avc_ref_payload_t* %[[REF_PAYLOAD]]) + +; CHECK-LLVM: %[[SIC_INIT:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_payload_t* @_Z34intel_sub_group_avc_sic_initializeDv2_t(<2 x i16> zeroinitializer) + +; CHECK-LLVM: %[[SIC_CONF1:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_payload_t* @_Z37intel_sub_group_avc_sic_configure_ipehhhhhhh37ocl_intel_sub_group_avc_sic_payload_t(i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]]) +; CHECK-LLVM: %[[SIC_CONF2:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_payload_t* @_Z37intel_sub_group_avc_sic_configure_ipehhhhhhttth37ocl_intel_sub_group_avc_sic_payload_t(i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i16 0, i16 0, i16 0, i8 0, %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]]) + +; CHECK-LLVM: %[[LUMA_DIST:[a-z0-9]+]] = call spir_func i16 @_Z52intel_sub_group_avc_sic_get_best_ipe_luma_distortion36ocl_intel_sub_group_avc_sic_result_t(%opencl.intel_sub_group_avc_sic_result_t* %[[SIC_RESULT]]) +; CHECK-LLVM: %[[LUMA_DIST:[a-z0-9]+]] = call spir_func i16 @_Z45intel_sub_group_avc_ref_convert_to_mce_result36ocl_intel_sub_group_avc_ref_result_t(%opencl.intel_sub_group_avc_ref_result_t* %[[REF_RESULT]]) + + \ No newline at end of file diff --git a/test/transcoding/subgroup_avc_intel_not_builtin.spt b/test/transcoding/subgroup_avc_intel_not_builtin.spt new file mode 100644 index 0000000000..7044bbe13c --- /dev/null +++ b/test/transcoding/subgroup_avc_intel_not_builtin.spt @@ -0,0 +1,35 @@ +119734787 65536 393230 8 0 +2 Capability Addresses +2 Capability Linkage +2 Capability Kernel +5 ExtInstImport 1 "OpenCL.std" +3 MemoryModel 1 2 +3 Source 3 200000 +11 Name 4 "_Z31intel_sub_group_avc_mce_ime_boo" +3 Name 5 "foo" +4 Name 6 "entry" +5 Decorate 5 LinkageAttributes "foo" Export +13 Decorate 4 LinkageAttributes "_Z31intel_sub_group_avc_mce_ime_boo" Import +2 TypeVoid 2 +3 TypeFunction 3 2 + + +5 Function 2 4 0 3 + +1 FunctionEnd + +5 Function 2 5 2 3 + +2 Label 6 +4 FunctionCall 2 7 4 +1 Return + +1 FunctionEnd + +; RUN: llvm-spirv %s -to-binary -o %t.spv +; RUN: llvm-spirv -r %t.spv -o %t.bc +; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM + +; CHECK-LLVM: define spir_func void @foo() +; CHECK-LLVM: call spir_func void @_Z31intel_sub_group_avc_mce_ime_boo() + diff --git a/test/transcoding/subgroup_avc_intel_types.spt b/test/transcoding/subgroup_avc_intel_types.spt new file mode 100644 index 0000000000..74f874b19d --- /dev/null +++ b/test/transcoding/subgroup_avc_intel_types.spt @@ -0,0 +1,111 @@ +119734787 65536 393230 53 0 +2 Capability Addresses +2 Capability Linkage +2 Capability Kernel +2 Capability Groups +2 Capability SubgroupAvcMotionEstimationINTEL +5 ExtInstImport 1 "OpenCL.std" +3 MemoryModel 1 2 +3 Source 3 102000 +3 Name 4 "foo" +4 Name 5 "entry" +5 Name 8 "payload_mce" +5 Name 11 "payload_ime" +5 Name 14 "payload_ref" +5 Name 17 "payload_sic" +5 Name 20 "result_mce" +5 Name 23 "result_ime" +5 Name 26 "result_ref" +5 Name 29 "result_sic" +5 Name 32 "sstreamout" +5 Name 35 "dstreamout" +5 Name 38 "sstreamin" +5 Name 41 "dstreamin" +4 Decorate 52 Alignment 4 +2 DecorationGroup 52 +5 Decorate 4 LinkageAttributes "foo" Export +14 GroupDecorate 52 8 11 14 17 20 23 26 29 32 35 38 41 +2 TypeVoid 2 +3 TypeFunction 3 2 +2 TypeAvcMcePayloadINTEL 6 +4 TypePointer 7 7 6 +2 TypeAvcImePayloadINTEL 9 +4 TypePointer 10 7 9 +2 TypeAvcRefPayloadINTEL 12 +4 TypePointer 13 7 12 +2 TypeAvcSicPayloadINTEL 15 +4 TypePointer 16 7 15 +2 TypeAvcMceResultINTEL 18 +4 TypePointer 19 7 18 +2 TypeAvcImeResultINTEL 21 +4 TypePointer 22 7 21 +2 TypeAvcRefResultINTEL 24 +4 TypePointer 25 7 24 +2 TypeAvcSicResultINTEL 27 +4 TypePointer 28 7 27 +2 TypeAvcImeResultSingleReferenceStreamoutINTEL 30 +4 TypePointer 31 7 30 +2 TypeAvcImeResultDualReferenceStreamoutINTEL 33 +4 TypePointer 34 7 33 +2 TypeAvcImeSingleReferenceStreaminINTEL 36 +4 TypePointer 37 7 36 +2 TypeAvcImeDualReferenceStreaminINTEL 39 +4 TypePointer 40 7 39 +3 ConstantNull 9 42 +3 ConstantNull 12 43 +3 ConstantNull 15 44 +3 ConstantNull 21 45 +3 ConstantNull 24 46 +3 ConstantNull 27 47 +3 ConstantNull 30 48 +3 ConstantNull 33 49 +3 ConstantNull 36 50 +3 ConstantNull 39 51 + + +5 Function 2 4 2 3 + +2 Label 5 +4 Variable 7 8 7 +4 Variable 10 11 7 +4 Variable 13 14 7 +4 Variable 16 17 7 +4 Variable 19 20 7 +4 Variable 22 23 7 +4 Variable 25 26 7 +4 Variable 28 29 7 +4 Variable 31 32 7 +4 Variable 34 35 7 +4 Variable 37 38 7 +4 Variable 40 41 7 +5 Store 11 42 2 4 +5 Store 14 43 2 4 +5 Store 17 44 2 4 +5 Store 23 45 2 4 +5 Store 26 46 2 4 +5 Store 29 47 2 4 +5 Store 32 48 2 4 +5 Store 35 49 2 4 +5 Store 38 50 2 4 +5 Store 41 51 2 4 +1 Return + +1 FunctionEnd + +; RUN: llvm-spirv %s -to-binary -o %t.spv +; RUN: llvm-spirv -r %t.spv -o %t.bc +; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM + +; CHECK-LLVM: %opencl.intel_sub_group_avc_mce_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_mce_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_single_reference_streamin_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t = type opaque +; CHECK-LLVM: define spir_func void @foo() \ No newline at end of file diff --git a/test/transcoding/subgroup_avc_intel_vme_image.spt b/test/transcoding/subgroup_avc_intel_vme_image.spt new file mode 100644 index 0000000000..e89f95d959 --- /dev/null +++ b/test/transcoding/subgroup_avc_intel_vme_image.spt @@ -0,0 +1,211 @@ +119734787 65536 393230 93 0 +2 Capability Addresses +2 Capability Linkage +2 Capability Kernel +2 Capability ImageBasic +2 Capability Groups +2 Capability Int8 +2 Capability SubgroupAvcMotionEstimationINTEL +5 ExtInstImport 1 "OpenCL.std" +3 MemoryModel 2 2 +3 Source 3 102000 +3 Name 6 "foo" +3 Name 7 "src" +3 Name 8 "ref" +4 Name 9 "sampler" +4 Name 10 "entry" +5 Name 12 "src.addr" +5 Name 13 "ref.addr" +6 Name 15 "sampler.addr" +5 Name 18 "ime_payload" +5 Name 21 "sstreamin" +5 Name 24 "dstreamin" +5 Name 27 "ref_payload" +5 Name 30 "sic_payload" +7 Name 40 "TempSampledImage" +7 Name 41 "TempSampledImage1" +4 Name 43 "call" +7 Name 44 "TempSampledImage2" +7 Name 45 "TempSampledImage3" +7 Name 46 "TempSampledImage4" +4 Name 47 "call1" +7 Name 48 "TempSampledImage5" +7 Name 49 "TempSampledImage6" +4 Name 51 "call2" +7 Name 52 "TempSampledImage7" +7 Name 53 "TempSampledImage8" +7 Name 54 "TempSampledImage9" +4 Name 56 "call3" +7 Name 57 "TempSampledImage10" +7 Name 58 "TempSampledImage11" +4 Name 59 "call4" +7 Name 60 "TempSampledImage12" +7 Name 61 "TempSampledImage13" +7 Name 62 "TempSampledImage14" +4 Name 63 "call5" +7 Name 64 "TempSampledImage15" +7 Name 65 "TempSampledImage16" +4 Name 67 "call6" +7 Name 68 "TempSampledImage17" +7 Name 69 "TempSampledImage18" +7 Name 70 "TempSampledImage19" +4 Name 71 "call7" +7 Name 72 "TempSampledImage20" +4 Name 73 "call8" +7 Name 76 "TempSampledImage21" +4 Name 77 "call9" +7 Name 80 "TempSampledImage22" +7 Name 81 "TempSampledImage23" +4 Name 83 "call10" +7 Name 84 "TempSampledImage24" +7 Name 85 "TempSampledImage25" +7 Name 86 "TempSampledImage26" +4 Name 87 "call11" +7 Name 88 "TempSampledImage27" +4 Name 89 "call12" +7 Name 90 "TempSampledImage28" +4 Name 91 "call13" +4 Decorate 92 Alignment 8 +2 DecorationGroup 92 +5 Decorate 6 LinkageAttributes "foo" Export +10 GroupDecorate 92 12 13 15 18 21 24 27 30 +4 TypeInt 74 32 0 +4 TypeInt 78 8 0 +4 Constant 74 75 0 +4 Constant 78 79 0 +2 TypeVoid 2 +10 TypeImage 3 2 1 0 0 0 0 0 0 +2 TypeSampler 4 +6 TypeFunction 5 2 3 3 4 +4 TypePointer 11 7 3 +4 TypePointer 14 7 4 +2 TypeAvcImePayloadINTEL 16 +4 TypePointer 17 7 16 +2 TypeAvcImeSingleReferenceStreaminINTEL 19 +4 TypePointer 20 7 19 +2 TypeAvcImeDualReferenceStreaminINTEL 22 +4 TypePointer 23 7 22 +2 TypeAvcRefPayloadINTEL 25 +4 TypePointer 26 7 25 +2 TypeAvcSicPayloadINTEL 28 +4 TypePointer 29 7 28 +3 TypeVmeImageINTEL 39 3 +2 TypeAvcImeResultINTEL 42 +2 TypeAvcImeResultSingleReferenceStreamoutINTEL 50 +2 TypeAvcImeResultDualReferenceStreamoutINTEL 55 +2 TypeAvcRefResultINTEL 66 +2 TypeAvcSicResultINTEL 82 + + +5 Function 2 6 2 5 +3 FunctionParameter 3 7 +3 FunctionParameter 3 8 +3 FunctionParameter 4 9 + +2 Label 10 +4 Variable 11 12 7 +4 Variable 11 13 7 +4 Variable 14 15 7 +4 Variable 17 18 7 +4 Variable 20 21 7 +4 Variable 23 24 7 +4 Variable 26 27 7 +4 Variable 29 30 7 +5 Store 12 7 2 8 +5 Store 13 8 2 8 +5 Store 15 9 2 8 +6 Load 3 31 12 2 8 +6 Load 3 32 13 2 8 +6 Load 4 33 15 2 8 +6 Load 16 34 18 2 8 +6 Load 19 35 21 2 8 +6 Load 22 36 24 2 8 +6 Load 25 37 27 2 8 +6 Load 28 38 30 2 8 +5 VmeImageINTEL 39 40 31 33 +5 VmeImageINTEL 39 41 32 33 +6 SubgroupAvcImeEvaluateWithSingleReferenceINTEL 42 43 40 41 34 +5 VmeImageINTEL 39 44 31 33 +5 VmeImageINTEL 39 45 32 33 +5 VmeImageINTEL 39 46 32 33 +7 SubgroupAvcImeEvaluateWithDualReferenceINTEL 42 47 44 45 46 34 +5 VmeImageINTEL 39 48 31 33 +5 VmeImageINTEL 39 49 32 33 +6 SubgroupAvcImeEvaluateWithSingleReferenceStreamoutINTEL 50 51 48 49 34 +5 VmeImageINTEL 39 52 31 33 +5 VmeImageINTEL 39 53 32 33 +5 VmeImageINTEL 39 54 32 33 +7 SubgroupAvcImeEvaluateWithDualReferenceStreamoutINTEL 55 56 52 53 54 34 +5 VmeImageINTEL 39 57 31 33 +5 VmeImageINTEL 39 58 32 33 +7 SubgroupAvcImeEvaluateWithSingleReferenceStreaminINTEL 42 59 57 58 34 35 +5 VmeImageINTEL 39 60 31 33 +5 VmeImageINTEL 39 61 32 33 +5 VmeImageINTEL 39 62 32 33 +8 SubgroupAvcImeEvaluateWithDualReferenceStreaminINTEL 42 63 60 61 62 34 36 +5 VmeImageINTEL 39 64 31 33 +5 VmeImageINTEL 39 65 32 33 +6 SubgroupAvcRefEvaluateWithSingleReferenceINTEL 66 67 64 65 37 +5 VmeImageINTEL 39 68 31 33 +5 VmeImageINTEL 39 69 32 33 +5 VmeImageINTEL 39 70 32 33 +7 SubgroupAvcRefEvaluateWithDualReferenceINTEL 66 71 68 69 70 37 +5 VmeImageINTEL 39 72 31 33 +6 SubgroupAvcRefEvaluateWithMultiReferenceINTEL 66 73 72 75 37 +5 VmeImageINTEL 39 76 31 33 +7 SubgroupAvcRefEvaluateWithMultiReferenceInterlacedINTEL 66 77 76 75 79 37 +5 VmeImageINTEL 39 80 31 33 +5 VmeImageINTEL 39 81 32 33 +6 SubgroupAvcSicEvaluateWithSingleReferenceINTEL 82 83 80 81 38 +5 VmeImageINTEL 39 84 31 33 +5 VmeImageINTEL 39 85 32 33 +5 VmeImageINTEL 39 86 32 33 +7 SubgroupAvcSicEvaluateWithDualReferenceINTEL 82 87 84 85 86 38 +5 VmeImageINTEL 39 88 31 33 +6 SubgroupAvcSicEvaluateWithMultiReferenceINTEL 82 89 88 75 38 +5 VmeImageINTEL 39 90 31 33 +7 SubgroupAvcSicEvaluateWithMultiReferenceInterlacedINTEL 82 91 90 75 79 38 +1 Return + +1 FunctionEnd + +; RUN: llvm-spirv %s -to-binary -o %t.spv +; RUN: llvm-spirv -r %t.spv -o %t.bc +; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM + +; CHECK-LLVM: %opencl.image2d_ro_t = type opaque +; CHECK-LLVM: %opencl.sampler_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_single_reference_streamin_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_payload_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_ref_result_t = type opaque +; CHECK-LLVM: %opencl.intel_sub_group_avc_sic_result_t = type opaque + +; CHECK-LLVM: %[[IMG2D:[0-9]+]] = load %opencl.image2d_ro_t +; CHECK-LLVM: %[[IMG2D2:[0-9]+]] = load %opencl.image2d_ro_t +; CHECK-LLVM: %[[SMPLR:[0-9]+]] = load %opencl.sampler_t +; CHECK-LLVM: %[[IME_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_payload_t*, %opencl.intel_sub_group_avc_ime_payload_t** +; CHECK-LLVM: %[[SINGLE_REF:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_single_reference_streamin_t*, %opencl.intel_sub_group_avc_ime_single_reference_streamin_t** +; CHECK-LLVM: %[[DUAL_REF:[0-9]+]] = load %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t*, %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t** +; CHECK-LLVM: %[[REF_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_ref_payload_t*, %opencl.intel_sub_group_avc_ref_payload_t** +; CHECK-LLVM: %[[SIC_PAYLOAD:[0-9]+]] = load %opencl.intel_sub_group_avc_sic_payload_t*, %opencl.intel_sub_group_avc_sic_payload_t** + +; CHECK-LLVM: %[[CALL9:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_t* @_Z54intel_sub_group_avc_ime_evaluate_with_single_reference14ocl_image2d_roS_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) +; CHECK-LLVM: %[[CALL10:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_t* @_Z52intel_sub_group_avc_ime_evaluate_with_dual_reference14ocl_image2d_roS_S_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) +; CHECK-LLVM: %[[CALL11:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_single_reference_streamout_t* @_Z64intel_sub_group_avc_ime_evaluate_with_single_reference_streamout14ocl_image2d_roS_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) +; CHECK-LLVM: %[[CALL12:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_dual_reference_streamout_t* @_Z62intel_sub_group_avc_ime_evaluate_with_dual_reference_streamout14ocl_image2d_roS_S_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]]) +; CHECK-LLVM: %[[CALL13:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_t* @_Z63intel_sub_group_avc_ime_evaluate_with_single_reference_streamin14ocl_image2d_roS_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t55ocl_intel_sub_group_avc_ime_single_reference_streamin_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]], %opencl.intel_sub_group_avc_ime_single_reference_streamin_t* %[[SINGLE_REF]]) +; CHECK-LLVM: %[[CALL14:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ime_result_t* @_Z61intel_sub_group_avc_ime_evaluate_with_dual_reference_streamin14ocl_image2d_roS_S_11ocl_sampler37ocl_intel_sub_group_avc_ime_payload_t53ocl_intel_sub_group_avc_ime_dual_reference_streamin_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ime_payload_t* %[[IME_PAYLOAD]], %opencl.intel_sub_group_avc_ime_dual_reference_streamin_t* %[[DUAL_REF]]) +; CHECK-LLVM: %[[CALL15:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_result_t* @_Z54intel_sub_group_avc_ref_evaluate_with_single_reference14ocl_image2d_roS_11ocl_sampler37ocl_intel_sub_group_avc_ref_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ref_payload_t* %[[REF_PAYLOAD]]) +; CHECK-LLVM: %[[CALL16:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_result_t* @_Z52intel_sub_group_avc_ref_evaluate_with_dual_reference14ocl_image2d_roS_S_11ocl_sampler37ocl_intel_sub_group_avc_ref_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ref_payload_t* %[[REF_PAYLOAD]]) +; CHECK-LLVM: %[[CALL17:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_result_t* @_Z53intel_sub_group_avc_ref_evaluate_with_multi_reference14ocl_image2d_roj11ocl_sampler37ocl_intel_sub_group_avc_ref_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], i32 0, %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ref_payload_t* %[[REF_PAYLOAD]]) +; CHECK-LLVM: %[[CALL18:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_ref_result_t* @_Z53intel_sub_group_avc_ref_evaluate_with_multi_reference14ocl_image2d_rojh11ocl_sampler37ocl_intel_sub_group_avc_ref_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], i32 0, i8 0, %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_ref_payload_t* %[[REF_PAYLOAD]]) +; CHECK-LLVM: %[[CALL19:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_result_t* @_Z54intel_sub_group_avc_sic_evaluate_with_single_reference14ocl_image2d_roS_11ocl_sampler37ocl_intel_sub_group_avc_sic_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]]) +; CHECK-LLVM: %[[CALL20:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_result_t* @_Z52intel_sub_group_avc_sic_evaluate_with_dual_reference14ocl_image2d_roS_S_11ocl_sampler37ocl_intel_sub_group_avc_sic_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.image2d_ro_t addrspace(1)* %[[IMG2D2]], %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]]) +; CHECK-LLVM: %[[CALL21:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_result_t* @_Z53intel_sub_group_avc_sic_evaluate_with_multi_reference14ocl_image2d_roj11ocl_sampler37ocl_intel_sub_group_avc_sic_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], i32 0, %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]]) +; CHECK-LLVM: %[[CALL22:[a-z0-9]+]] = call spir_func %opencl.intel_sub_group_avc_sic_result_t* @_Z53intel_sub_group_avc_sic_evaluate_with_multi_reference14ocl_image2d_rojh11ocl_sampler37ocl_intel_sub_group_avc_sic_payload_t(%opencl.image2d_ro_t addrspace(1)* %[[IMG2D]], i32 0, i8 0, %opencl.sampler_t addrspace(2)* %[[SMPLR]], %opencl.intel_sub_group_avc_sic_payload_t* %[[SIC_PAYLOAD]])